Commits · d36dd1f842c1ce1e6d07575ff71957f40eecd725 · Roger Ferrer / llvm-epi · GitLab

Nov 03, 2021
- [ARM] Push gather/scatter shl index updates out of loops · d36dd1f8
  David Green authored Nov 03, 2021
  d36dd1f8
- [PowerPC] Implement longdouble pack/unpack builtins · 741aeda9
  Qiu Chaofan authored Nov 03, 2021
  741aeda9
- [NFC][LoopVectorize] Add test for tail-folding loop with conditional uniform load · 9da8dde7
  David Sherwood authored Oct 27, 2021
  9da8dde7
- [NVPTX] Copy machine operand flags in TII::insertBranch · 30a3a17d
  Andrew Savonichev authored Nov 03, 2021
  30a3a17d
- [ARM][AsmParser] Don't emit "deprecated instruction in IT block" warning if requested · 803d4f8a
  Yi Kong authored Nov 03, 2021
  803d4f8a
- [InstCombine] Extend pattern to replace shuffle's insertelement operand · 03961709
  Piotr Sobczak authored Oct 22, 2021
  03961709
- Revert "[AArch64] Optimize add/sub with immediate" · 59c3b48d
  Ben Shi authored Nov 03, 2021
  59c3b48d
- [PowerPC] handle more splat loads without stack operation · 5a8b1963
  Chen Zheng authored Nov 03, 2021
  5a8b1963
- [OpenMP][FIX] Do not signal SPMD-mode but then keep generic-mode · d61aac76
  Johannes Doerfert authored Oct 31, 2021
  d61aac76
- [OpenMP][FIX] Introduce and use a simple generic-mode barrier · 73720c80
  Johannes Doerfert authored Oct 31, 2021
  73720c80
- [NVVM] Update intrinsic definitions to include more attributes · c690c1c9
  Johannes Doerfert authored Sep 17, 2021
  c690c1c9
- [AMDGPU] Fix SGPR checks in S_MOV_B64_IMM_PSEUDO generation. · fbe61fb0
  Abinav Puthan Purayil authored Nov 02, 2021
  fbe61fb0
- [AArch64] Optimize add/sub with immediate · 3de3ca31
  Ben Shi authored Nov 01, 2021
  3de3ca31
- [llvm-profgen] Warn on invalid range and show warning summary · 138202a8
  wlei authored Oct 25, 2021
  138202a8
- [X86][VARARG] Assign MMO earlier to avoid prolog insert point been sunk across... · 8f101971
  Phoebe Wang authored Nov 03, 2021
  8f101971
- [llvm-profdata] Print out section flags for FunctionMetadata section · d0eb472f
  Hongtao Yu authored Nov 02, 2021
  d0eb472f
Nov 02, 2021
- [AArch64] Diagnose large adrp offset on Windows. · c964afb2
  Eli Friedman authored Nov 02, 2021
  c964afb2
- [LV] Add test case from PR51794 for over-eager truncation. · e515d3a4
  Florian Hahn authored Nov 02, 2021
  e515d3a4
- [BasicAA] Use saturating multiply on range if nsw · 51e9f336
  Nikita Popov authored Oct 29, 2021
  51e9f336
- [CodeView] Fortran debug info emission in Code View. · 2ed29d87
  Chih-Ping Chen authored Oct 29, 2021
  2ed29d87
- [X86][AVX] Add PR51226 test case · 7011511f
  Simon Pilgrim authored Nov 02, 2021
  
  7011511f
- [InstCombine] Precommit updated and-xor-or.ll tests. NFC. · f75d986f
  Stanislav Mekhanoshin authored Nov 02, 2021
  f75d986f
- [RISCV] Optimize vp.load with an all-ones mask · d065b038
  Fraser Cormack authored Nov 02, 2021
  d065b038
- [InstCombine] add tests for bitwise select of vectors; NFC · 052a2913
  Sanjay Patel authored Nov 02, 2021
  
  052a2913
- [RISCV][VP] Mangle pointers in vp.load and vp.store tests · 9b591078
  Fraser Cormack authored Nov 01, 2021
  9b591078
- [LoopPeel] Peel loops with exits followed by an unreachable or deopt block · e09958d5
  Dmitry Makogon authored Nov 02, 2021
  e09958d5
- Add new choices dot-cfg and dot-cfg-quiet to print-changed. · 816761f0
  Jamie Schmeiser authored Nov 02, 2021
  816761f0
- [llvm-reduce] Reduce more GlobalValue properties · f54a8759
  Arthur Eubanks authored Oct 30, 2021
  f54a8759
- [llvm-reduce] Reduce some GlobalObject properties · 80ba72b0
  Arthur Eubanks authored Oct 30, 2021
  80ba72b0
- [Hexagon] Add machine verification to some tests · 9951d437
  Jay Foad authored Oct 27, 2021
  
  9951d437
- [Test] Regenerate IndVars test's checks · dd000e67
  Dmitry Makogon authored Nov 02, 2021
  dd000e67
- [Test] Fix tests showing generation of already existent PHIs by GVN · e15cf498
  Dmitry Makogon authored Nov 02, 2021
  e15cf498
- Revert "[AArch64][SVE] Combine predicated FMUL/FADD into FMA" · 895145aa
  Matt authored Nov 02, 2021
  895145aa
- [Test] Add tests showing congruent IVs not removed by IndVars · 94128f04
  Dmitry Makogon authored Nov 02, 2021
  94128f04
- [RISCV][VP] Add tests for "unmasked" VP loads · 1fc80ffc
  Fraser Cormack authored Nov 02, 2021
  1fc80ffc
- [InstCombine] change 'not' match for bitwise select · 82914616
  Sanjay Patel authored Nov 02, 2021
  82914616
- [Scalarizer] Do not insert instructions between PHI nodes and debug intrinsics. · 67887b0f
  Daniele Vettorel authored Nov 02, 2021
  67887b0f
- [AMDGPU] More robust checks in extract_vector_dynelt.ll · fce5a567
  Jay Foad authored Nov 02, 2021
  
  fce5a567
- [DAGCombiner] Teach combineShiftToMULH to handle constant and const splat vector. · a39eadcf
  Jianjian GUAN authored Nov 02, 2021
  a39eadcf
- [RISCV] Fix invalid kill on callee save · 4ec1b8ee
  David Callahan authored Nov 02, 2021
  4ec1b8ee