Commits · d71ad4108056d685f48407447095d8d92fd7685d · Roger Ferrer / llvm-epi · GitLab

Oct 12, 2022
- [SLP]Fix insertpoint of the extractellements instructions to avoid reshuffle crash. · d71ad410
  Alexey Bataev authored Oct 10, 2022
  d71ad410
- [InstCombine] fold udiv with common shl amount in operands · 008a8903
  Sanjay Patel authored Oct 12, 2022
  008a8903
- [FunctionAttrs] Regenerate test checks (NFC) · dbd29ed5
  Nikita Popov authored Oct 12, 2022
  
  dbd29ed5
- [NFC] Ignore unused var in no-asserts builds · cbae57c0
  Jordan Rupprecht authored Oct 12, 2022
  
  cbae57c0
- [UpdateTestChecks] Add basic BPF triple handling · 8727248b
  Simon Pilgrim authored Oct 12, 2022
  8727248b
- [SLP]Fix PR58177: Improve isUndefVector function to avoid extra freeze. · 1be3428e
  Alexey Bataev authored Oct 06, 2022
  1be3428e
- [SystemZ] Revert migration of SystemZ/Large/branch-01.ll · 0b926400
  Kai Nacke authored Oct 12, 2022
  0b926400
- [LV] Add extra tests for epilogue vectorization with widened inductions. · 26c8632f
  Florian Hahn authored Oct 12, 2022
  26c8632f
- [LoongArch] Handle missing CondCodes · ec2640bf
  gonglingqin authored Oct 12, 2022
  ec2640bf
- [InstCombine] propagate "exact" through folds of div · fe97f950
  Sanjay Patel authored Oct 12, 2022
  fe97f950
- [InstCombine] add "exact" to div tests to show missing propagation; NFC · 2639caf5
  Sanjay Patel authored Oct 12, 2022
  
  2639caf5
- [InstCombine] add helper function for div+shl folds; NFC · d117ee25
  Sanjay Patel authored Oct 12, 2022
  d117ee25
- [InstCombine] add tests for div with shl operands; NFC · bc032c7f
  Sanjay Patel authored Oct 11, 2022
  
  bc032c7f
- [LoongArch] Add earlyclobber of destination register to atomic instructions · b1d7a95e
  gonglingqin authored Oct 12, 2022
  b1d7a95e
- [PowerPC][NFC] refactor some test cases. · 5f4927da
  Chen Zheng authored Oct 12, 2022
  
  5f4927da
- [VPlan] Remove dead recipes before sinking. · c1fe52bf
  Florian Hahn authored Oct 12, 2022
  c1fe52bf
- [NFC] Perform all legality checks for non-trivial unswitch in one function · fbad5fdc
  Max Kazantsev authored Oct 12, 2022
  fbad5fdc
- Don't widen shuffle element with AVX512 · f885c080
  Luo, Yuanke authored Oct 12, 2022
  f885c080
- [VPlan] Add test for sinking pointer induction increments. · bbf01ab7
  Florian Hahn authored Oct 12, 2022
  bbf01ab7
- [test][DebugInfo] Convert some test cases to opaque pointers. NFC · 391f3236
  Bjorn Pettersson authored Oct 12, 2022
  391f3236
- [llvm-objdump] Support nonzero section addresses in addSymbolizer · 02b5d3bc
  Pierre van Houtryve authored Oct 07, 2022
  02b5d3bc
- Revert "[AArch64] Add support for 128-bit non temporal loads." · 1e723b7a
  David Green authored Oct 12, 2022
  1e723b7a
- [AArch64] Exclude instructions after setting the FP from SEH prologues · a07787c9
  Martin Storsjö authored Oct 11, 2022
  a07787c9
- [AArch64][SVE] Add instcombine for PTEST_ANY(X=OP(PG,...), X) -> PTEST_ANY(PG, X)) · 388cacb3
  Cullen Rhodes authored Oct 12, 2022
  388cacb3
- [AArch64][SVE] NFC: auto-generate llvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-ptest.ll · 5b5756e6
  Cullen Rhodes authored Oct 07, 2022
  
  5b5756e6
- [CMake] Add option LLVM_FORCE_CREATE_SYMLINKS · fc651a06
  Tobias Hieta authored Oct 12, 2022
  fc651a06
- [Attributes] Make intrinsic attribute generation more flexible (NFC) · 2a26a445
  Nikita Popov authored Oct 11, 2022
  2a26a445
- [AArch64][SVE] Fix BRKNS bug in optimizePTestInstr · a17fcb22
  Cullen Rhodes authored Oct 12, 2022
  a17fcb22
- [AArch64] NFC: Auto-generate llvm/test/CodeGen/AArch64/sve-ptest-removal-brk.ll · 495d9e1f
  Cullen Rhodes authored Sep 28, 2022
  
  495d9e1f
- [MC] [Win64EH] Generate ARM64 packed unwind info with signed return addresses · afa6bb64
  Martin Storsjö authored Oct 11, 2022
  afa6bb64
- [AArch64] Add support for the SEH opcode for return address signing · c43bff64
  Martin Storsjö authored Oct 05, 2022
  c43bff64
- [runtimes] Use a response file for runtimes test suites · 2a66abb1
  Petr Hosek authored Aug 18, 2022
  2a66abb1
- [SimpleLoopUnswitch][NFC] Separate legality checks from cost computation · 6bfcac61
  Max Kazantsev authored Oct 12, 2022
  6bfcac61
- [NFC] Factor out computation of best unswitch cost candidate · 421728b4
  Max Kazantsev authored Oct 12, 2022
  421728b4
- [llvm] [cmake] Support finding both static and shared zstd via FindZstd · 56f94ede
  Michał Górny authored Oct 07, 2022
  56f94ede
- [AArch64][Windows] Check sret attribute also for inreg attribute · 41f5bbe1
  chenglin.bi authored Oct 12, 2022
  41f5bbe1
- [RISCV] Add isel patterns for vmacc, vnmsac. · 2749b942
  Yeting Kuo authored Oct 05, 2022
  2749b942
- [RISCV] Use mask/tail agnostic if tied source is IMPLICIT_DEF regardless of the policy operand. · 1bdf21d5
  Craig Topper authored Oct 11, 2022
  1bdf21d5
- Revert "[DAGCombiner] Fold (mul (sra X, BW-1), Y) -> (neg (and (sra X, BW-1), Y))" · ac920975
  Craig Topper authored Oct 11, 2022
  ac920975
- [RISCV] Remove unused SchedClass WriteVFCvtFToFV. NFC · 902c1b3c
  Craig Topper authored Oct 11, 2022
  902c1b3c