Commits · d72545b293f9fe33fb6c7f5ab611f48860fd8d16 · Roger Ferrer / llvm-epi · GitLab

May 31, 2023
- [RISCV] Change LdPat and StPat from multiclass to class. NFC · cf229033
  Craig Topper authored May 31, 2023
  cf229033
May 25, 2023
- [RISCV][CodeGen] Support Zdinx on RV32 codegen · 8b90f8e0
  Shao-Ce SUN authored May 25, 2023
  8b90f8e0
May 04, 2023
- [RISCV][CodeGen] Support Zdinx on RV64 codegen · 2dc0fa05
  Shao-Ce SUN authored May 04, 2023
  2dc0fa05
Apr 26, 2023
- [RISCV] Custom lowering of llvm.is.fpclass · 5b869f3e
  LiaoChunyu authored Apr 26, 2023
  5b869f3e
Mar 31, 2023
- [RISCV] Add named constants for rounding mode to tablegen. NFC · efc5b518
  Craig Topper authored Mar 31, 2023
  efc5b518
Mar 22, 2023
- [RISCV] Clear mayRaiseFPException for fclass.d instruction. · c176edc0
  Craig Topper authored Mar 21, 2023
  c176edc0
Feb 05, 2023
- [RISCV] Move all isel cases for ISD::ConstantFP into RISCVDAGToDAGISel::Select. · b9a2893b
  Craig Topper authored Feb 04, 2023
  b9a2893b
Jan 31, 2023
- [RISCV] Handle FRMArg as an optional operand instead of using InstAliases. · 6a1b2d04
  Craig Topper authored Jan 31, 2023
  6a1b2d04
Dec 14, 2022
- [RISCV] Add a bit to TSFlags to mark SignExtendingOpW instructions for SExtWRemoval. · 3e7dad22
  Craig Topper authored Dec 14, 2022
  3e7dad22
Oct 26, 2022
- [RISCV] Inline scalar ceil/floor/trunc/rint/round/roundeven. · e94dc58d
  Craig Topper authored Oct 26, 2022
  e94dc58d
Sep 12, 2022
- [RISCV] Rename WriteFALU* and ReadFALU* to WriteFAdd*/ReadFAdd*. · d49280e0
  Craig Topper authored Sep 12, 2022
  d49280e0
Aug 01, 2022
- [RISCV] Explicitly select second operand of branch condition to X0. · 450edb0b
  Craig Topper authored Aug 01, 2022
  450edb0b
Jun 04, 2022
- [RISCV] Add more patterns for FNMADD · f14d18c7
  LiaoChunyu authored Jun 02, 2022
  f14d18c7
May 03, 2022
- [RISCV] Add isCommutable to FADD/FMUL/FMIN/FMAX/FEQ. · 72a66358
  Craig Topper authored May 02, 2022
  72a66358
Mar 08, 2022
- [RISCV] Share PatFprFpr classes for F, D, and Zfh · 365c858a
  Shao-Ce SUN authored Mar 08, 2022
  365c858a
Mar 02, 2022
- [RISCV] add the MC layer support of Zfinx extension · 0e38b295
  Shao-Ce SUN authored Mar 01, 2022
  0e38b295
Feb 24, 2022
- Revert "[RISCV] add the MC layer support of Zfinx extension" · c7fe6f9c
  Nikita Popov authored Feb 24, 2022
  c7fe6f9c
Feb 17, 2022
- [RISCV] add the MC layer support of Zfinx extension · 7798ecca
  Shao-Ce SUN authored Feb 17, 2022
  7798ecca
Jan 20, 2022
- [RISCV] Optimize lowering of floating-point -0.0 · 5a12024b
  Fraser Cormack authored Jan 19, 2022
  5a12024b
Jan 12, 2022
- [RISCV] Add strictfp support for compares. · 63b17eb9
  Craig Topper authored Jan 11, 2022
  63b17eb9
Jan 06, 2022
- [RISCV] Change RISCVISD::FCVT*RTZ opcodes to take rounding mode as an operand. · 808c6626
  Craig Topper authored Jan 05, 2022
  808c6626
Dec 30, 2021
- [RISCV] Add support for STRICT_LRINT/LLRINT/LROUND/LLROUND. Tests for other strict intrinsics. · 15787ccd
  Craig Topper authored Dec 30, 2021
  15787ccd
Dec 27, 2021
- [RISCV] Reduce repetitive codes in flw, fsw · 70a98008
  Shao-Ce SUN authored Dec 24, 2021
  70a98008
Dec 23, 2021
- [RISCV] Support strict FP conversion operations. · b7b260e1
  Craig Topper authored Dec 23, 2021
  b7b260e1
Dec 14, 2021
- [RISCV] Add isel support for scalar STRICT_FADD/FSUB/FMUL/FDIV/FSQRT. · 39268934
  Craig Topper authored Dec 14, 2021
  39268934
- [RISCV] Add mayRaiseFPException to RISCV scalar FP instructions. · d4d76409
  Craig Topper authored Dec 14, 2021
  d4d76409
- [RISCV] Add rs2 encoding to the FPUnaryOp_r and FPUnaryOp_r_frm template arguments. · 3cda3879
  Craig Topper authored Dec 13, 2021
  3cda3879
Dec 10, 2021
- [RISCV] Share tablegen classes for F, D, and Zfh. Other simplifications. NFC · 80ed2f6b
  Craig Topper authored Dec 10, 2021
  80ed2f6b
Aug 08, 2021
- [RISCV] Support FP_TO_S/UINT_SAT for i32 and i64. · d4ee84ce
  Craig Topper authored Aug 07, 2021
  d4ee84ce
Jul 31, 2021
- [RISCV] Rename RISCVISD::FCVT_W_RV64 to FCVT_W_RTZ_RV64. NFC · 593059b3
  Craig Topper authored Jul 31, 2021
  593059b3
Jul 24, 2021
- [RISCV] Custom lower (i32 (fptoui/fptosi X)). · c63dbd85
  Craig Topper authored Jul 24, 2021
  c63dbd85
Jul 06, 2021
- [RISCV] Implement lround*/llround*/lrint*/llrint* with fcvt instruction with -fno-math-errno · 12d51f95
  Craig Topper authored Jul 06, 2021
  12d51f95
May 06, 2021
- [RISCV] Cleanup instruction formats used for B extension ternary operations. · 58323be4
  Craig Topper authored May 06, 2021
  58323be4
Apr 21, 2021
- [RISCV] Cleanup up the spec version references around fmaxnum/fminnum. · 023b243d
  Craig Topper authored Apr 21, 2021
  023b243d
Mar 27, 2021
- [RISCV] Merge FMulAdd and FMulSub scheduler classes to a single FMA scheduler class. NFC · 4d5ee71b
  Craig Topper authored Mar 26, 2021
  4d5ee71b
Feb 25, 2021
- [RISCV] Use a ComplexPattern for zexti32 to match sexti32. · 9bde2962
  Craig Topper authored Feb 24, 2021
  9bde2962
Feb 22, 2021
- [RISCV] Have sexti32 also recognize AssertZExt from types smaller than i32. · 3231607c
  Craig Topper authored Feb 22, 2021
  3231607c
Feb 15, 2021
- [RISCV] Add expicit i32/i64 types to RV32 or RV64 only isel patterns. NFC · 29b894a8
  Craig Topper authored Feb 15, 2021
  29b894a8
Dec 10, 2020
- [RISCV][LegalizeDAG] Expand SETO and SETUO comparisons. Teach LegalizeDAG to... · a1ae3c6a
  Craig Topper authored Dec 10, 2020
  a1ae3c6a
Dec 05, 2020
- [RISCV] Use fcvt.h/d/f.w if the input is an assertsexti32 not just when the input is sext_inreg. · 03fc4f2e
  Craig Topper authored Dec 04, 2020
  
  03fc4f2e