Commits · d8e1dd8b9b6554b750b6727a521c28b58ae79c1f · Roger Ferrer / llvm-epi · GitLab

Apr 23, 2020
- [Hexagon] Add missing live-in registers in some codegen tests · d8e1dd8b
  Krzysztof Parzyszek authored Apr 23, 2020
  
  d8e1dd8b
- [AMDGPU] Use SGPR instead of SReg classes · 0337017a
  Jay Foad authored Apr 22, 2020
  0337017a
- [AArch64] Define ACLE FP conversion intrinsics with more specific predicate. · a5e0389b
  Sander de Smalen authored Apr 23, 2020
  a5e0389b
- [AArch64][GlobalISel] Set the current debug loc when missing in some cases. · 613f12dd
  Amara Emerson authored Apr 23, 2020
  
  613f12dd
- [AArch64CollectLOH] Debug insts should not break LOH collection [14/14] · e0b60c6d
  Vedant Kumar authored Apr 17, 2020
  e0b60c6d
- [AArch64PreLegalizerCombiner] Fix debug invariance issue in matchFConstantToConstant [13/14] · ff8c417d
  Vedant Kumar authored Apr 16, 2020
  ff8c417d
- [AArch64LoadStoreOptimizer] Skip debug insts during pattern matching [12/14] · c2c2dc52
  Vedant Kumar authored Apr 17, 2020
  c2c2dc52
- [AArch64ConditionOptimizer] Fix missed optimization due to debug insts [11/14] · bf4c70b3
  Vedant Kumar authored Apr 15, 2020
  bf4c70b3
- [AArch64CondBrTuning] Ignore debug insts when scanning for NZCV clobbers [10/14] · 78d69e97
  Vedant Kumar authored Apr 15, 2020
  78d69e97
- [AArch64] Clean up assorted usage of hasOneUse/use_instructions [9/14] · 4a51b61c
  Vedant Kumar authored Apr 15, 2020
  4a51b61c
- [AArch64ConditionalCompares] Ignore debug insts in findConvertibleCompare [8/14] · b157974a
  Vedant Kumar authored Apr 14, 2020
  b157974a
- [AArch64InstrInfo] Ignore debug insts in areCFlagsAccessedBetweenInstrs [7/14] · f0b52bee
  Vedant Kumar authored Apr 14, 2020
  f0b52bee
- [AArch64InstrInfo] Ignore debug insts in canInstrSubstituteCmpInstr [6/14] · 26271c83
  Vedant Kumar authored Apr 15, 2020
  26271c83
- [GIsel][LegalizerHelper] Account for debug insts when creating mem libcalls [5/14] · f1a71b59
  Vedant Kumar authored Apr 16, 2020
  f1a71b59
- [GIsel][CombinerHelper] Fix for missed... · ba9db545
  Vedant Kumar authored Apr 15, 2020
  ba9db545
- [GIsel][CombinerHelper] Don't consider debug insts in dominance queries [3/14] · 5c04274d
  Vedant Kumar authored Apr 15, 2020
  5c04274d
- [GISel][RegBankSelect] Hide assertion failure from LLT::getScalarSizeInBits [2/14] · 5bae2775
  Vedant Kumar authored Apr 14, 2020
  5bae2775
- [ARM] Mark some tests as not safe for -debugify-and-strip-all, NFC · 6b58018c
  Vedant Kumar authored Apr 14, 2020
  6b58018c
- [MachineDebugify] Insert synthetic DBG_VALUE instructions · 2a5675f1
  Vedant Kumar authored Apr 13, 2020
  2a5675f1
Apr 22, 2020
- [MachineOutliner] Teach outliner to set live-ins · 1a78b0bd
  Eli Friedman authored Apr 21, 2020
  1a78b0bd
- [PowerPC][Future] Initial support for PCRel addressing to get block address · a60ca4b4
  Victor Huang authored Apr 22, 2020
  a60ca4b4
- [llvm][MIRVRegNamer] Avoid collisions across jump table indices. · 264c07ef
  Puyan Lotfi authored Apr 11, 2020
  264c07ef
- [ARM] Replace arm vendor with none. NFC · eecba950
  David Green authored Apr 22, 2020
  
  eecba950
- [PowerPC][Future] Remove redundant r2 save and restore for indirect call · 02141a17
  Victor Huang authored Apr 22, 2020
  02141a17
- [PowerPC][Future] Initial support for PCRel addressing for jump tables. · 43abef06
  Victor Huang authored Apr 22, 2020
  43abef06
- [ARM] Don't shrink STM if it would cause an unknown base register store · 8211cfb7
  John Brawn authored Apr 22, 2020
  8211cfb7
- [ARM] Distribute MVE post-increments · 892af45c
  David Green authored Apr 22, 2020
  892af45c
- [ARM] MVE FMA loop tests. NFC · 48ac4e69
  David Green authored Apr 22, 2020
  
  48ac4e69
- [AMDGPU] Add 192-bit register classes · dbdffe3e
  Jay Foad authored Apr 16, 2020
  dbdffe3e
- [NFC][llvm][X86] Adding missing -mtiple to X86 test. · 727e6fb8
  Lucas Prates authored Apr 22, 2020
  727e6fb8
- [AArch64][SVE] Add SVE intrinsic for LD1RQ · 17f6e18a
  Kerry McLaughlin authored Apr 22, 2020
  17f6e18a
- [llvm] [X86] Make test more robust against different builds · 5397f290
  aartbik authored Apr 21, 2020
  5397f290
- [PowerPC] Exploit RLDIMI for OR with large immediates · c12722cd
  Qiu Chaofan authored Apr 17, 2020
  c12722cd
Apr 21, 2020
- [ARM] Fix MIR tests with invalid live-ins. · 704293b1
  Eli Friedman authored Apr 20, 2020
  704293b1
- [AArch64] Fix MIR tests with invalid live-ins. · b4b9faa1
  Eli Friedman authored Apr 20, 2020
  b4b9faa1
- [llvm] [X86] Fixed type bug in vselect for AVX masked load · 8387bee9
  aartbik authored Apr 21, 2020
  8387bee9
- [AArch64] FMLA/FMLS patterns improvement. · be881e28
  Pavel Iliin authored Apr 15, 2020
  be881e28
- [XRay] Change xray_instr_map sled addresses from absolute to PC relative for x86-64 · 5771c985
  Fangrui Song authored Apr 13, 2020
  5771c985
- [PowerPC][Future] Add offsets to PC Relative relocations. · a92ee77d
  Stefan Pintilie authored Apr 21, 2020
  a92ee77d
- [PowerPC] Add a new test case expand-isel-liveness.mir · e477915b
  Kang Zhang authored Apr 21, 2020
  
  e477915b