Commits · d91057bf529e45fd915628ab990b750a5f8f7430 · Roger Ferrer / llvm-epi · GitLab

Dec 08, 2017
- Revert r320104: infinite loop profiling bug fix · d91057bf
  Xinliang David Li authored Dec 08, 2017
  d91057bf
- AMDGPU: Report Arg's Value name in metadata if kernel_arg_name metadata is not available · e30f88f3
  Konstantin Zhuravlyov authored Dec 08, 2017
  e30f88f3
- Reverting r320166 to fix test failures. · ad840d22
  Michael Trent authored Dec 08, 2017
  ad840d22
- Updated llvm-objdump to display local relocations in Mach-O binaries · de5209bd
  Michael Trent authored Dec 08, 2017
  de5209bd
- [DebugInfo] Use llc instead of llc_dwarf to fix this test. · b5a62cc8
  Davide Italiano authored Dec 08, 2017
  b5a62cc8
- [X86][SHA] Tag SHA instructions scheduler classes · 19d460b0
  Simon Pilgrim authored Dec 08, 2017
  19d460b0
- [InstCombine] PR35354: Convert store(bitcast, load bitcast (select (Cond, &V1,... · ec95c6cc
  Alexey Bataev authored Dec 08, 2017
  ec95c6cc
- [SCEV] Fix predicate usage in computeExitLimitFromICmp · 9c08b7a0
  Max Kazantsev authored Dec 08, 2017
  9c08b7a0
- [X86][Haswell]: Updating the scheduling information for the Haswell subtarget. · 2cf601f2
  Gadi Haber authored Dec 08, 2017
  2cf601f2
- [AArch64] Avoid SIMD interleaved store instruction for Exynos. · 2c80e4c7
  Abderrazek Zaafrani authored Dec 08, 2017
  2c80e4c7
- Revert "[WebAssemby] Support main functions with alternate signatures." · 9e1baeda
  Derek Schuff authored Dec 08, 2017
  9e1baeda
- [X86] Handle alls version of vXi1 insert_vector_elt with a constant index... · 323ba39f
  Craig Topper authored Dec 08, 2017
  323ba39f
Dec 07, 2017
- [PowerPC][asan] Update asan to handle changed memory layouts in newer kernels · 957a076c
  Bill Seurer authored Dec 07, 2017
  957a076c
- Temporarily revert "[PowerPC] Allow tail calls of fastcc functions from C CallingConv functions." · a469acac
  Eric Christopher authored Dec 07, 2017
  a469acac
- [PGO] detect infinite loop and form MST properly · 4b0027f6
  Xinliang David Li authored Dec 07, 2017
  4b0027f6
- [MachineOutliner] Fix offset overflow check · 59948666
  Jessica Paquette authored Dec 07, 2017
  59948666
- [AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output." · 9ebdbb43
  Mark Searles authored Dec 07, 2017
  9ebdbb43
- [AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output. · a84d2348
  Mark Searles authored Dec 07, 2017
  a84d2348
- [AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() and... · d29f24ac
  Mark Searles authored Dec 07, 2017
  d29f24ac
- [X86] Fix InsertBitToMaskVector to only issue KSHIFTS of native size so that... · dfc79c7c
  Craig Topper authored Dec 07, 2017
  dfc79c7c
- [InstCombine] add tests for abs using bit hackery; NFC · 6cfc1368
  Sanjay Patel authored Dec 07, 2017
  6cfc1368
- [X86] Tag BMI/BMI2/TBM instructions scheduler classes · 386b23f1
  Simon Pilgrim authored Dec 07, 2017
  386b23f1
- [Hexagon] Generate HVX code for basic arithmetic operations · 039d4d92
  Krzysztof Parzyszek authored Dec 07, 2017
  039d4d92
- [X86][TBM] Add TBM scheduling tests · d2e93e76
  Simon Pilgrim authored Dec 07, 2017
  d2e93e76
- [X86] Rename function in recently added test case to not be 'main' returning 'void'. NFC · 5db260fc
  Craig Topper authored Dec 07, 2017
  5db260fc
- [DebugInfo] Move this test to X86/ now that it specifies a triple. · f6e180d5
  Davide Italiano authored Dec 07, 2017
  f6e180d5
- [X86] Tag SALC instructions scheduler class · 2983b469
  Simon Pilgrim authored Dec 07, 2017
  2983b469
- [X86] Add LAHF/SAHF scheduling test · ffce0d8f
  Simon Pilgrim authored Dec 07, 2017
  ffce0d8f
- [X86] Add SALC scheduling test · a383f842
  Simon Pilgrim authored Dec 07, 2017
  a383f842
- [X86] Tag LZCNT/TZCNT instructions scheduler classes · f1d599ad
  Simon Pilgrim authored Dec 07, 2017
  f1d599ad
- [DAGCombiner] eliminate shuffle of insert element · 9012391a
  Sanjay Patel authored Dec 07, 2017
  9012391a
- [InstCombine] Don't crash on out of bounds index in the insertelement · 4a4f2e8c
  Igor Laevsky authored Dec 07, 2017
  4a4f2e8c
- [X86][FMA] Regenerate fma schedule tests · ff521209
  Simon Pilgrim authored Dec 07, 2017
  ff521209
- [X86] Tag RDRAND/RDSEED instruction scheduler classes · 60411d9a
  Simon Pilgrim authored Dec 07, 2017
  60411d9a
- [X86] Regenerate RDTSC codegen tests · 9a2898ed
  Simon Pilgrim authored Dec 07, 2017
  9a2898ed
- [WebAssemby] Support main functions with alternate signatures. · cdaa87dd
  Dan Gohman authored Dec 07, 2017
  cdaa87dd
- [X86][RDSEED] Add rdseed scheduling tests · 439679c0
  Simon Pilgrim authored Dec 07, 2017
  439679c0
- [X86][RDRAND] Add rdrand scheduling tests · eb87fe62
  Simon Pilgrim authored Dec 07, 2017
  eb87fe62
- [RISCV] MC layer support for the jump/branch instructions of the RVC extension · f8f4b905
  Alex Bradbury authored Dec 07, 2017
  f8f4b905
- [RISCV] MC layer support for load/store instructions of the C (compressed) extension · 9f6aec4b
  Alex Bradbury authored Dec 07, 2017
  9f6aec4b