Commits · d915b3e485e998d9e331d4362761761398eb6d9d · Roger Ferrer / llvm-epi · GitLab

Jun 18, 2022
- [X86] Regenerate sar_fold.ll to show all instructions · d915b3e4
  Simon Pilgrim authored Jun 18, 2022
  
  d915b3e4
- [X86] Use X86 instead of X32 for i686 check prefixes · 91e29562
  Simon Pilgrim authored Jun 18, 2022
  91e29562
- [MachineCopyPropagation][RISCV] Fix D125335 accidentally change control flow. · e2913362
  Han-Kuan Chen authored Jun 17, 2022
  e2913362
- [MachineCopyPropagation][RISCV] Add test case showing failure for MachineCopyPropagation. NFC · dbfb00a9
  Han-Kuan Chen authored Jun 17, 2022
  dbfb00a9
- [DirectX] Add DirectX target object writer · 2af61e62
  Chris Bieneman authored Jun 06, 2022
  2af61e62
- llvm-dwarf-dump: include type name for AT_containing_type · c20381b2
  Felipe de Azevedo Piovezan authored Jun 18, 2022
  c20381b2
- [test][RPOFuncAttrs] Update norecurse.ll · 2538a411
  Arthur Eubanks authored Jun 17, 2022
  2538a411
Jun 17, 2022
- [RISCV] Move store policy and mask reg ops into demanded handling in InsertVSETVLI · 4d245f1b
  Philip Reames authored Jun 17, 2022
  4d245f1b
- Recommit "[LAA] Initial support for runtime checks with pointer selects." · e9cced27
  Florian Hahn authored Jun 17, 2022
  e9cced27
- [AArch64] add tests for masked subtract; NFC · f1266438
  Sanjay Patel authored Jun 17, 2022
  
  f1266438
- [InstCombine] Fold memcmp of constant arrays and variable size · 5fb67e32
  Martin Sebor authored Jun 17, 2022
  5fb67e32
- [PowerPC] Fix PPCVSXSwapRemoval pass to include MTVSCR and MFVSCR as not swappable. · deb76552
  Quinn Pham authored Jun 17, 2022
  deb76552
- [RISCV] Avoid changing etype for splat of 0 or -1 · 755c84c6
  Philip Reames authored Jun 17, 2022
  755c84c6
- [InstCombine] convert mask and shift of power-of-2 to cmp+select · bfde8619
  Sanjay Patel authored Jun 17, 2022
  bfde8619
- [AMDGPU] gfx11 waitcnt support for VINTERP and LDSDIR instructions · 2a683647
  Joe Nash authored Jun 14, 2022
  2a683647
- [LoopVectorize] Add support for invariant stores of ordered reductions · 6bb40552
  Malhar Jajoo authored Jun 17, 2022
  6bb40552
- [AMDGPU] gfx11 VINTERP intrinsics and ISel support · 20d20156
  Joe Nash authored Jun 09, 2022
  20d20156
- Reland "Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type support on... · 655ba9c8
  Phoebe Wang authored Jun 17, 2022
  655ba9c8
- [AMDGPU] gfx11 ldsdir intrinsics and ISel · 6d5d8b13
  Joe Nash authored Jun 13, 2022
  6d5d8b13
- [AMDGPU] More GFX11 test coverage · 0b9dc768
  Jay Foad authored Jun 17, 2022
  
  0b9dc768
- [InstCombine] Push freeze through recurrence phi · c6b88cb9
  Nikita Popov authored Jun 16, 2022
  c6b88cb9
- [InstCombine] add tests for FP casts; NFC · a5040860
  Sanjay Patel authored Jun 17, 2022
  
  a5040860
- [InstCombine] add tests for (pow2 >> X) >u C; NFC · af5e64df
  Sanjay Patel authored Jun 15, 2022
  
  af5e64df
- [SelectionDAG] Extend WidenVecOp_INSERT_SUBVECTOR to cover more cases. · 0e21f1d5
  Paul Walker authored Jun 09, 2022
  0e21f1d5
- [AMDGPU] Use explicit -global-isel=0/1 in tests. NFC. · 03a99103
  Jay Foad authored Jun 17, 2022
  
  03a99103
- [AArch64][LV] AArch64 does not prefer vectorized addressing · b329156f
  Tiehu Zhang authored Jun 17, 2022
  b329156f
- [IR] Check for SignedMin/-1 division in canTrap() (PR56038) · daf897d5
  Nikita Popov authored Jun 17, 2022
  daf897d5
- [InstCombine] Add tests for freeze of recurrence with invoke start (NFC) · 5ae4a173
  Nikita Popov authored Jun 17, 2022
  
  5ae4a173
- Revert "Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type support on... · 1a202529
  Benjamin Kramer authored Jun 17, 2022
  1a202529
- [RISCV][NFC] Add load/store instructions in rv64*-invalid.s · 880ac518
  ping.deng authored Jun 17, 2022
  880ac518
- [AArch64][test] Add --mattr=-{sve,sve2,sme} to SVE/SVE2/SME MC tests · f4b7b66c
  Fangrui Song authored Jun 16, 2022
  f4b7b66c
- Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type support on X86 following the psABI""" · 04a3d5f3
  Phoebe Wang authored Jun 17, 2022
  04a3d5f3
- [LegalizeTypes][RISCV][NFC] Modify assert in PromoteIntRes_STEP_VECTOR and add some tests for RISCV · 16215eb9
  Lian Wang authored Jun 16, 2022
  16215eb9
- [RISCV][NFC][test] Correct a wrong test in vreductions-fp-vp.ll · 5e16a781
  Lian Wang authored Jun 17, 2022
  5e16a781
- llvm-reduce: Add reduction pass to simplify instructions · eea11e73
  Matt Arsenault authored Jun 08, 2022
  
  eea11e73
- llvm-reduce: Support replacing FP values with 1.0 · 6b8bd0f7
  Matt Arsenault authored Jun 09, 2022
  
  6b8bd0f7
- [SVE][CodeGen] Restructure SVE fixed length tests to use update_llc_test_checks. · fcd058ac
  Paul Walker authored Jun 13, 2022
  fcd058ac
- [RISCV] Implement RISCVTargetLowering::getTargetConstantFromLoad. · 9d7b01dc
  Craig Topper authored Jun 16, 2022
  9d7b01dc
Jun 16, 2022
- [SelectionDAG] Don't apply MinRCSize constraint in... · e6c7a3a5
  Craig Topper authored Jun 16, 2022
  e6c7a3a5
- [RISCV] Add cost model for scalable scatter and gather · d764aa7f
  Philip Reames authored Jun 16, 2022
  d764aa7f