Commits · d98f74a470d6b1bf57f3ad4e8e2c1a18ddfed491 · Roger Ferrer / llvm-epi · GitLab

Nov 30, 2022
- [Nomination] Adding Mozilla representative to security group · d14c2d40
  serge-sans-paille authored Nov 29, 2022
  d14c2d40
- [CMake] Support injecting extra dependencies for perf-training · dabd2391
  Petr Hosek authored Nov 30, 2022
  dabd2391
Nov 29, 2022
- Recommit "[LoopFlatten] Enable it by default" · 3ea6a9a4
  Sjoerd Meijer authored Nov 29, 2022
  3ea6a9a4
Nov 28, 2022
- [LegacyPM] Remove pipeline extension mechanism · 7ae6838d
  Arthur Eubanks authored Oct 24, 2022
  7ae6838d
- Remove TargetMachine::adjustPassManager · 99c47d9e
  Bjorn Pettersson authored Nov 10, 2022
  99c47d9e
Nov 27, 2022
- [Docs] Mention to add RUN line before running script to generate assertion · 7603b1e2
  Shivam Gupta authored Nov 27, 2022
  
  7603b1e2
Nov 23, 2022
- Revert "Make -fsanitize=scudo use scudo_standalone. Delete check-scudo." · 907baeec
  Hans Wennborg authored Nov 23, 2022
  907baeec
Nov 22, 2022
- Make -fsanitize=scudo use scudo_standalone. Delete check-scudo. · ab1a5991
  Mitch Phillips authored Nov 22, 2022
  ab1a5991
Nov 21, 2022
- [XCOFF] llvm-readobj support display symbol table of loader section of xcoff object file. · a56d0e84
  zhijian authored Nov 21, 2022
  a56d0e84
Nov 19, 2022
- Revert "[XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file." · be954243
  Vitaly Buka authored Nov 19, 2022
  be954243
Nov 18, 2022
- [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV · 98e342dc
  Michael Maitland authored Nov 04, 2022
  98e342dc
- [XCOFF] llvvm-readobj support display symbol table of loader section of xcoff object file. · 037f5c28
  zhijian authored Nov 18, 2022
  037f5c28
- [docs] remove extra slash from llvm github url · 96484553
  Aarush Bhat authored Nov 18, 2022
  96484553
Nov 17, 2022
- LangRef: Fix repeated word · f34fe2a3
  Matt Arsenault authored Nov 11, 2022
  
  f34fe2a3
Nov 16, 2022
- [LangRef] remove callbr references from Addresses of BasicBlock section · 2d3d8c9a
  Nick Desaulniers authored Nov 16, 2022
  2d3d8c9a
- [VP][RISCV] Add vp.nearbyint and RISC-V support. · ed9638c4
  Yeting Kuo authored Nov 09, 2022
  ed9638c4
- [VP][RISCV] Add vp.bswap and RISC-V support. · 5c3ca10b
  Yeting Kuo authored Nov 14, 2022
  5c3ca10b
- Revert "[RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV" · e8e92c83
  Michael Maitland authored Nov 15, 2022
  e8e92c83
- [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV · b88b8307
  Michael Maitland authored Nov 04, 2022
  b88b8307
Nov 15, 2022
- Revert "[RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV" · 2323a4ee
  Michael Maitland authored Nov 15, 2022
  2323a4ee
- [RISCV][llvm-mca] Use LMUL Instruments to provide more accurate reports on RISCV · 5e82ee53
  Michael Maitland authored Nov 04, 2022
  5e82ee53
- [GlobalISel] Remove semantic operand of G_IS_FPCLASS · ec893da9
  Serge Pavlov authored Nov 15, 2022
  ec893da9
Nov 14, 2022
- [RISCV] Implement assembler support for XVentanaCondOps · 780c5398
  Philip Reames authored Nov 14, 2022
  780c5398
- [docs][OpaquePtr] Fix hyperlinks · 9d78bbe6
  Mindong Chen authored Nov 14, 2022
  
  9d78bbe6
- [Docs] Add Documentation on BOLT Build Configs · b9378a60
  Aiden Grossman authored Nov 14, 2022
  b9378a60
- [Docs] Add Documentation on (Thin)LTO + PGO Build Configs · f7dea680
  Aiden Grossman authored Nov 12, 2022
  f7dea680
Nov 12, 2022
- [Docs] Minor Fixups in Advanced Builds Documentation · f53fde8e
  Aiden Grossman authored Nov 12, 2022
  f53fde8e
- docs: add instructions for stand-alone builds of lld · b473734e
  Tom Stellard authored Nov 11, 2022
  b473734e
Nov 11, 2022
- [LangRef][LoongArch] Update inline asm constraint code and operand modifier · 070ab2bb
  Xiaodong Liu authored Nov 11, 2022
  070ab2bb
Nov 10, 2022
- docs: Add instructions for stand-alone builds of clang · 1cb97a1e
  Tom Stellard authored Nov 10, 2022
  1cb97a1e
- [AArch64] RME MEC instructions and system registers · 00d98e65
  Keith Walker authored Nov 04, 2022
  00d98e65
Nov 09, 2022
- [AArch64] Add support for the Cortex-X3 CPU · 9d1ff787
  Victor Campos authored Oct 19, 2022
  9d1ff787
- [X86] Support -march=sierraforest, grandridge, graniterapids. · 84a18a26
  Freddy Ye authored Nov 09, 2022
  84a18a26
Nov 08, 2022
- Use opt -passes=<name> instead of opt -name · ac696ac4
  Bjorn Pettersson authored Nov 07, 2022
  ac696ac4
- [Docs] Add my Office Hours · b293de98
  Paulo Matos authored Nov 07, 2022
  
  b293de98
Nov 07, 2022
- [IR] Allow available_externally GlobalAlias · 90ad3e3c
  Fangrui Song authored Nov 07, 2022
  90ad3e3c
Nov 06, 2022
- Online sync-ups: add SYCL working group sync details. · e0ed3d5d
  Alexey Bader authored Nov 06, 2022
  
  e0ed3d5d
Nov 04, 2022
- [IR] Switch everything to use memory attribute · 304f1d59
  Nikita Popov authored Nov 02, 2022
  304f1d59
- [X86] Support -march=raptorlake, meteorlake · a806fc27
  Freddy Ye authored Nov 04, 2022
  a806fc27
Nov 03, 2022
- [AArch64] Add support for the Cortex-A715 CPU · fa8aeab6
  Simi Pallipurath authored Oct 28, 2022
  fa8aeab6