Commits · dada014781e8277ddc829e47aa337ab9792d8485 · Roger Ferrer / llvm-epi · GitLab

Sep 26, 2017
- [AVR] When lowering shifts into loops, put newly generated MBBs in the same · dada0147
  Dylan McKay authored Sep 26, 2017
  dada0147
- [AVR] Use 1-byte alignment for all data types · 832c4a65
  Dylan McKay authored Sep 26, 2017
  832c4a65
- [docs] llvm-cov: Make docs for boolean options more consistent · 305e1b56
  Vedant Kumar authored Sep 25, 2017
  305e1b56
- [llvm-cov] Warn if -show-functions is used without query files · feb3f527
  Vedant Kumar authored Sep 25, 2017
  feb3f527
- Modernize comments · cbbcf2f8
  Adrian Prantl authored Sep 25, 2017
  cbbcf2f8
- Modernize comments · 4bdf4d18
  Adrian Prantl authored Sep 25, 2017
  4bdf4d18
- Add section headers to SpecialCaseLists · 998b220e
  Vlad Tsyrklevich authored Sep 25, 2017
  998b220e
- Revert r312724 ("[ARM] Remove redundant vcvt patterns."). · edee9999
  Eli Friedman authored Sep 25, 2017
  edee9999
- [GlobalISel] Update the documentation and comment for G_[UN]MERGE_VALUES · b7f45eb6
  Quentin Colombet authored Sep 25, 2017
  b7f45eb6
- [GlobalISel] Update the documentation for G_SEQUENCE · 1d22e943
  Quentin Colombet authored Sep 25, 2017
  1d22e943
- [GlobalISel] Update the documentation and comments for G_EXTRACT · 513a93d0
  Quentin Colombet authored Sep 25, 2017
  513a93d0
- X86: remove R12 from CSR on Windows x64 SwiftCC · 2e0d7231
  Saleem Abdulrasool authored Sep 25, 2017
  2e0d7231
Sep 25, 2017
- [ARM] Fix tests for vcvt+store to return void. · 48853741
  Eli Friedman authored Sep 25, 2017
  48853741
- [ARM] Add tests for vcvt followed by store. · 7961112d
  Eli Friedman authored Sep 25, 2017
  7961112d
- [ARM] Regenerate vcvt test checks. · 7404fad2
  Eli Friedman authored Sep 25, 2017
  7404fad2
- [InstCombine] Move an optimization from foldICmpAndConstConst to foldICmpUsingKnownBits · 30dc9797
  Craig Topper authored Sep 25, 2017
  30dc9797
- [X86] Don't select anyext GR32->GR64 to SUBREG_TO_REG. Use INSERT_SUBREG instead. · 5124a14d
  Craig Topper authored Sep 25, 2017
  5124a14d
- [X86] Make all the NOREX CodeGenOnly instructions into postRA pseudos like the... · d830f276
  Craig Topper authored Sep 25, 2017
  d830f276
- [llvm-objcopy] Refactor code to include initialize method · f5a43773
  Jake Ehrlich authored Sep 25, 2017
  f5a43773
- [InstCombine] remove extract-of-select vector transform (2nd try) · ecb17560
  Sanjay Patel authored Sep 25, 2017
  ecb17560
- [Hexagon] Avoid unused variable warnings in Release builds. · 82b7103a
  Benjamin Kramer authored Sep 25, 2017
  82b7103a
- Revert "[NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.", rL314135. · d31d5e6a
  Justin Lebar authored Sep 25, 2017
  d31d5e6a
- [X86] [ASM INTEL SYNTAX] fix for incorrect assembler code generation when... · 741099bc
  Konstantin Belochapka authored Sep 25, 2017
  741099bc
- [SelectionDAG] Teach simplifyDemandedBits to handle shifts by constant splat vectors · 5bc10ede
  Craig Topper authored Sep 25, 2017
  5bc10ede
- [SLP] Add a test for PR32086, NFC. · b3aec7a6
  Alexey Bataev authored Sep 25, 2017
  b3aec7a6
- [Hexagon] Better determination of register classes in bit tracker · 7e604dec
  Krzysztof Parzyszek authored Sep 25, 2017
  7e604dec
- [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins. · 9941ee95
  Artem Belevich authored Sep 25, 2017
  9941ee95
- [Hexagon] Make getHexagonSubRegIndex take reference instead of pointer · d72bd834
  Krzysztof Parzyszek authored Sep 25, 2017
  d72bd834
- [AVX-512] Replace large number of explicit patterns that check for... · ba3cc2e0
  Craig Topper authored Sep 25, 2017
  ba3cc2e0
- [SimplifyIndvar] Minor change to refine r314125, NFC · bbe448ab
  Hongbin Zheng authored Sep 25, 2017
  bbe448ab
- ARM: One more fix for swifterror CSR set · b45717ad
  Arnold Schwaighofer authored Sep 25, 2017
  b45717ad
- [SimplifyIndvar] Replace the srem used by IV if we can prove both of its operands are non-negative · f0093e45
  Hongbin Zheng authored Sep 25, 2017
  f0093e45
- [ARM] Fix -Wdangling-else warning. · a23c1a37
  Benjamin Kramer authored Sep 25, 2017
  a23c1a37
- ARM: Use the proper swifterror CSR list on platforms other than darwin · ae4de58a
  Arnold Schwaighofer authored Sep 25, 2017
  ae4de58a
- revert r314117 because there are bogus clang tests that depend on the optimizer · aa7f750b
  Sanjay Patel authored Sep 25, 2017
  aa7f750b
- [InstCombine] remove extract-of-select vector transform · 9639897d
  Sanjay Patel authored Sep 25, 2017
  9639897d
- Remove trailing whitespaces. · b30286d8
  Michael Liao authored Sep 25, 2017
  b30286d8
- [DebugInfo] Sort the SDDbgValue list before assuming it is in IR order · 8898cd8d
  Reid Kleckner authored Sep 25, 2017
  8898cd8d
- Use {} instead of make_pair and an iterator for the insertion point, NFC · 09e75c93
  Reid Kleckner authored Sep 25, 2017
  09e75c93
- [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess (VF8 stride 4): · 4a97df01
  Michael Zuckerman authored Sep 25, 2017
  4a97df01