Commits · dc1bb79b92b69bb40d22d65bf0bcb8b09dc1dd48 · Roger Ferrer / llvm-epi · GitLab

May 06, 2016
- AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2. · dc1bb79b
  Nikolay Haustov authored May 06, 2016
  dc1bb79b
- AMDGPU/SI: Add amdgpu_kernel calling convention. Part 1. · 1f7732ab
  Nikolay Haustov authored May 06, 2016
  1f7732ab
May 05, 2016
- AMDGPU: Run r600 tests last · 6689abe6
  Matt Arsenault authored May 05, 2016
  6689abe6
- AMDGPU: Uniform branch conditions can originate with intrinsics · ffbd56a1
  Nicolai Haehnle authored May 05, 2016
  ffbd56a1
- AMDGPU/SI: Add support for AMD code object version 2. · fcfaea4c
  Tom Stellard authored May 05, 2016
  fcfaea4c
May 02, 2016
- AMDGPU: Custom lower v2i32 loads and stores · bcdfee70
  Matt Arsenault authored May 02, 2016
  bcdfee70
- AMDGPU/SI: Use v_readfirstlane_b32 when restoring SGPRs spilled to scratch · 154c9cdd
  Tom Stellard authored May 02, 2016
  154c9cdd
- AMDGPU: Make i64 loads/stores promote to v2i32 · 2b957b5a
  Matt Arsenault authored May 02, 2016
  2b957b5a
- AMDGPU/SI: Use the hazard recognizer to break SMEM soft clauses · 1f520e5c
  Tom Stellard authored May 02, 2016
  1f520e5c
- AMDGPU/SI: Use hazard recognizer to detect DPP hazards · a27007eb
  Tom Stellard authored May 02, 2016
  a27007eb
Apr 30, 2016
- AMDGPU/SI: Remove wait state handling for SMRD in SIInsertWaits · c51e4468
  Tom Stellard authored Apr 30, 2016
  c51e4468
- AMDGPU/SI: Enable the post-ra scheduler · cb6ba62d
  Tom Stellard authored Apr 30, 2016
  cb6ba62d
Apr 29, 2016
- AMDGPU: Fix crash with unreachable terminators. · 701c21ea
  Matt Arsenault authored Apr 29, 2016
  701c21ea
- AMDGPU: Add kernarg.segment.ptr intrinsic · dc4ebad6
  Matt Arsenault authored Apr 29, 2016
  dc4ebad6
- DAGCombiner: Reduce truncated shl width · ab2232cf
  Matt Arsenault authored Apr 29, 2016
  ab2232cf
- AMDGPU/SI: Add offset field to ds_permute/ds_bpermute instructions · 92b24f32
  Tom Stellard authored Apr 29, 2016
  92b24f32
- AMDGPU/SI: Assembler: Unify parsing/printing of operands. · 4f672a34
  Nikolay Haustov authored Apr 29, 2016
  4f672a34
- RegisterPressure: Fix default lanemask for missing regunit intervals · f3619b82
  Matthias Braun authored Apr 29, 2016
  f3619b82
Apr 28, 2016
- AMDGPU: Emit error if too much LDS is used · 1c4d0efe
  Matt Arsenault authored Apr 28, 2016
  1c4d0efe
- AMDGPU: Fix mishandling array allocations when promoting alloca · c5fce690
  Matt Arsenault authored Apr 28, 2016
  c5fce690
- CodeGen: Add DetectDeadLanes pass. · fbe85ae1
  Matthias Braun authored Apr 28, 2016
  fbe85ae1
Apr 27, 2016
- AMDGPU: Account for globals in AMDGPUPromoteAlloca pass · 0547b016
  Matt Arsenault authored Apr 27, 2016
  0547b016
- AMDGPU/SI: Add llvm.amdgcn.s.waitcnt.all intrinsic · f66bdb5e
  Nicolai Haehnle authored Apr 27, 2016
  f66bdb5e
- [AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware registers. · 5cd55b17
  Artem Tamazov authored Apr 27, 2016
  5cd55b17
Apr 26, 2016
- [AMDGPU] Reserve VGPRs for trap handler usage if instructed · 1d99c4d0
  Konstantin Zhuravlyov authored Apr 26, 2016
  1d99c4d0
Apr 25, 2016
- AMDGPU: Implement addrspacecast · 99c14524
  Matt Arsenault authored Apr 25, 2016
  99c14524
- AMDGPU: Add queue ptr intrinsic · 48ab526f
  Matt Arsenault authored Apr 25, 2016
  48ab526f
- [AMDGPU][llvm-mc] s_getreg/setreg* - Add hwreg(...) syntax. · d6468666
  Artem Tamazov authored Apr 25, 2016
  d6468666
Apr 23, 2016
- AMDGPU: sext_inreg (srl x, K), vt -> bfe x, K, vt.Size · 7e8de01f
  Matt Arsenault authored Apr 22, 2016
  7e8de01f
- AMDGPU: Re-visit nodes in performAndCombine · efa3fe14
  Matt Arsenault authored Apr 22, 2016
  efa3fe14
Apr 22, 2016
- DAGCombiner: Relax alignment restriction when changing store type · 3b748d76
  Matt Arsenault authored Apr 22, 2016
  3b748d76
- DAGCombiner: Relax alignment restriction when changing load type · 629d12de
  Matt Arsenault authored Apr 22, 2016
  629d12de
- [AMDGPU] Insert nop pass: take care of outstanding feedback · a40d8358
  Konstantin Zhuravlyov authored Apr 22, 2016
  a40d8358
- AMDGPU/SI: add llvm.amdgcn.ps.live intrinsic · b0c97487
  Nicolai Haehnle authored Apr 22, 2016
  b0c97487
Apr 21, 2016
- DAGCombiner: Reduce 64-bit BFE pattern to pattern on 32-bit component · 8d1052f5
  Matt Arsenault authored Apr 21, 2016
  8d1052f5
Apr 20, 2016
- [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC. · 029a0567
  Mandeep Singh Grang authored Apr 19, 2016
  029a0567
Apr 19, 2016
- Add IntrWrite[Arg]Mem intrinsic property · b48275f1
  Nicolai Haehnle authored Apr 19, 2016
  b48275f1
- AMDGPU: Guard VOPC instructions against incorrect commute · e2dda4f7
  Nicolai Haehnle authored Apr 19, 2016
  e2dda4f7
Apr 18, 2016
- [AMDGPU] Add insert nops pass based on subtarget features instead of cl::opt · 8c273ad7
  Konstantin Zhuravlyov authored Apr 18, 2016
  8c273ad7
Apr 16, 2016
- AMDGPU: Enable LocalStackSlotAllocation pass · c10783c4
  Matt Arsenault authored Apr 16, 2016
  c10783c4