Commits · dce313c3cf3948b057428ee97145d7641951afbb · Roger Ferrer / llvm-epi · GitLab

Mar 21, 2017
- DAG: Fold bitcast/extract_vector_elt of undef to undef · dce313c3
  Matt Arsenault authored Mar 21, 2017
  dce313c3
- Fix shufpd test name. · 5e39cbae
  Simon Pilgrim authored Mar 21, 2017
  5e39cbae
- [x86] use PMOVMSK for vector-sized equality comparisons · 79379cae
  Sanjay Patel authored Mar 21, 2017
  79379cae
- [X86][AVX] Tests showing missing SHUFPD + ZERO lowering · 8bda0351
  Simon Pilgrim authored Mar 21, 2017
  8bda0351
- [AMDGPU] Iterative scheduling infrastructure + minimal registry scheduler · fd4c410f
  Valery Pykhtin authored Mar 21, 2017
  fd4c410f
- [GlobalISel] Fix shufflevector tests · 044e0032
  Volkan Keles authored Mar 21, 2017
  044e0032
- [ADMGPU] SDWA peephole optimization pass. · f60ad58d
  Sam Kolton authored Mar 21, 2017
  f60ad58d
- [DebugInfo][X86] Teach Optimize LEAs pass to handle debug values · 7937be7d
  Andrea Di Biagio authored Mar 21, 2017
  7937be7d
- [DAGTypeLegalizer] Handle widening truncate to vector of i1. · 54c7680e
  Jonas Paulsson authored Mar 21, 2017
  54c7680e
- [GlobalISel] Translate shufflevector · 75bdc769
  Volkan Keles authored Mar 21, 2017
  75bdc769
- [SystemZ] Don't drop MO flags in foldMemoryOperandImpl() · bd65421f
  Jonas Paulsson authored Mar 21, 2017
  bd65421f
- Revert "[Hexagon] Recognize polynomial-modulo loop idiom again" · c12716e7
  Vitaly Buka authored Mar 21, 2017
  c12716e7
- [ARM] Revert r297443 and r297820. · 76732acc
  Eli Friedman authored Mar 21, 2017
  76732acc
Mar 20, 2017
- [ARM] Fix PR32130: Handle promotion of zero sized constants. · ba789cbd
  Vadzim Dambrouski authored Mar 20, 2017
  ba789cbd
- [x86] add tests for setcc of i128/i256; NFC · f238902f
  Sanjay Patel authored Mar 20, 2017
  f238902f
- GlobalISel: add implicit defs & uses when mutating an instruction. · 4340d64f
  Tim Northover authored Mar 20, 2017
  4340d64f
- [X86] Clean up test/CodeGen/X86/2006-03-01-InstrSchedBug.ll · d6154847
  David L. Jones authored Mar 20, 2017
  d6154847
- Add test case for merging of chained stores of mismatched type. · f5f0864a
  Nirav Dave authored Mar 20, 2017
  f5f0864a
- [Hexagon] Recognize polynomial-modulo loop idiom again · 8490251d
  Krzysztof Parzyszek authored Mar 20, 2017
  8490251d
- [AMDGPU] Run always inliner early in opt · 2534bc07
  Konstantin Zhuravlyov authored Mar 20, 2017
  2534bc07
- [WinEH] Adjust decision to emit SEH moves for leaf functions · 8819c738
  Reid Kleckner authored Mar 20, 2017
  8819c738
- GlobalISel: allow quad-precision values to be dumped. · 89268b18
  Tim Northover authored Mar 20, 2017
  89268b18
- [GlobalISel] Use the correct calling conv for calls · d79253a9
  Diana Picus authored Mar 20, 2017
  d79253a9
- Revert "[AMDGPU] Run always inliner early in opt" · 8a67eb14
  Konstantin Zhuravlyov authored Mar 20, 2017
  8a67eb14
Mar 19, 2017
- [AVX-512] Handle kor/kand/kandn/kxor/kxnor/knot intrinsics at lowering time instead of isel · 5992c8d1
  Craig Topper authored Mar 19, 2017
  5992c8d1
- Fix constant folding of fp2int to large integers · 8424df7d
  Simon Pilgrim authored Mar 19, 2017
  8424df7d
- [GlobalISel] Don't select trivially dead instructions. · 931904d7
  Ahmed Bougacha authored Mar 19, 2017
  931904d7
- [GlobalISel][AArch64] Add DBG_VALUE select test. NFC. · 48bcd22c
  Ahmed Bougacha authored Mar 19, 2017
  48bcd22c
- [GlobalISel][AArch64] Split out cast select tests. NFC. · dcd416a4
  Ahmed Bougacha authored Mar 19, 2017
  dcd416a4
- [MIR] Test assumes x64 windows calling convention upon printing/parsing MIR output/input. · 75537b65
  Oren Ben Simhon authored Mar 19, 2017
  75537b65
- [MIR] Add triple to test that assumes it runs on windows. · 6520f83b
  Benjamin Kramer authored Mar 19, 2017
  6520f83b
- CalleeSavedRegister was removed from MIR and is recalculated upon MIR parsing. · 9ce0ec5d
  Oren Ben Simhon authored Mar 19, 2017
  9ce0ec5d
- Moving the test to x86 because other architectures do not suport regcall calling convention. · a96fdbf2
  Oren Ben Simhon authored Mar 19, 2017
  a96fdbf2
- [MIR] Support Customed Register Mask and CSRs · 0ef61ec3
  Oren Ben Simhon authored Mar 19, 2017
  0ef61ec3
Mar 18, 2017
- Make library calls sensitive to regparm module flag (Fixes PR3997). · ac6081cb
  Nirav Dave authored Mar 18, 2017
  ac6081cb
- [AMDGPU] Add address space based alias analysis pass · 8e45acfc
  Stanislav Mekhanoshin authored Mar 17, 2017
  8e45acfc
- [x86] regenerate checks; NFC · 0429b1a4
  Sanjay Patel authored Mar 17, 2017
  0429b1a4
Mar 17, 2017
- [x86] regenerate checks; NFC · 77e6ebe7
  Sanjay Patel authored Mar 17, 2017
  77e6ebe7
- [Outliner] Add outliner for AArch64 · ea8cc09b
  Jessica Paquette authored Mar 17, 2017
  ea8cc09b
- Add !associated metadata. · 51c962f7
  Evgeniy Stepanov authored Mar 17, 2017
  51c962f7