Commits · dd3b90e4d77b0cc874ffcaaeb28776ba0fd15032 · Roger Ferrer / llvm-epi · GitLab

Mar 19, 2022
- [AArch64] Combine ISD::SETCC into AArch64ISD::ANDS · dd3b90e4
  chenglin.bi authored Mar 19, 2022
  dd3b90e4
- [AArch64] Fix incorrect getSetCCInverse usage within trySwapVSelectOperands. · f46fe36d
  Paul Walker authored Mar 17, 2022
  f46fe36d
Mar 18, 2022
- [AArch64] Custom lower concat(v4i8 load, ...) · fe6057a2
  David Green authored Mar 18, 2022
  fe6057a2
Mar 17, 2022
- [AArch64] Add extra insert-subvector tests. NFC · 0fa4aeb4
  David Green authored Mar 17, 2022
  
  0fa4aeb4
- [AArch64] Combine ISD::AND into AArch64ISD::ANDS · 0b6df40c
  David Green authored Mar 17, 2022
  0b6df40c
Mar 16, 2022
- [AArch64] Regenerate and extend peephole-and-tst.ll tests. NFC · 09a2b5b5
  David Green authored Mar 16, 2022
  
  09a2b5b5
- [SelectionDAG] Emit calls to __divei4 and friends for division/remainder of large integers · 09854f2a
  Matthias Gehre authored Feb 22, 2022
  09854f2a
Mar 14, 2022
- [GlobalISel] Fix store merging incorrectly merging volatile stores. · 8cbf18cb
  Amara Emerson authored Mar 14, 2022
  8cbf18cb
- [MTE] Add test that stack tagging does not mess up stack coloring. · 628c537b
  Florian Mayer authored Mar 10, 2022
  628c537b
- [regalloc] Remove -consider-local-interval-cost · 294eca35
  Mircea Trofin authored Mar 07, 2022
  294eca35
- [AArch64] Perform last active true vector combine · 35683338
  zhongyunde authored Mar 15, 2022
  35683338
- [OpaquePtr][AArch64] Use elementtype on ldxr/stxr · 250620f7
  Arthur Eubanks authored Feb 24, 2022
  250620f7
Mar 13, 2022
- [SDAG] simplify bitwise logic with repeated operand · c2592c37
  Sanjay Patel authored Mar 13, 2022
  c2592c37
- [AArch64] add tests for bitwise logic reassociation; NFC · 9f4caf55
  Sanjay Patel authored Mar 13, 2022
  9f4caf55
Mar 11, 2022
- [AArch64][SVE] Change the asserts in LowerToPredicatedOp to check for legal types · aeeb1199
  David Sherwood authored Mar 09, 2022
  aeeb1199
- [AArch64] Use correct calling convention for each vararg · 26cd2584
  Philippe Valembois authored Mar 10, 2022
  26cd2584
Mar 10, 2022
- [AArch64] TBL uses zero for out of range elements. · 21a97a2a
  David Green authored Mar 10, 2022
  21a97a2a
- [AArch64] Extra tests for tbl with zero elements. NFC · 43591be2
  David Green authored Mar 10, 2022
  
  43591be2
- TLS loads opimization (hoist) · c3101432
  Xiang1 Zhang authored Mar 02, 2022
  c3101432
Mar 09, 2022
- AArch64: correct epilogue/prologue emission for swift async · c31f0a00
  Saleem Abdulrasool authored Mar 08, 2022
  c31f0a00
- [SDAG] match rotate pattern with extra 'or' operation · 34162365
  Sanjay Patel authored Mar 09, 2022
  34162365
Mar 08, 2022
- [AArch64] Add test for D120481 with multiple uses. · 3836003e
  Florian Hahn authored Mar 08, 2022
  
  3836003e
Mar 07, 2022
- [AArch64] Perform first active true vector combine · c22c8b15
  zhongyunde authored Mar 08, 2022
  c22c8b15
- [AArch64] Turn truncating buildvectors into truncates · d9633d14
  David Green authored Mar 07, 2022
  d9633d14
Mar 06, 2022
- [DAG] Don't convert undef to 0 when creating buildvector · 4388f4f7
  David Green authored Mar 06, 2022
  4388f4f7
Mar 05, 2022
- [AArch64] Some tests to show reconstructing truncates. NFC · 84ccd015
  David Green authored Mar 05, 2022
  
  84ccd015
- [AArch64] fix i128-math.ll · 1d8093fe
  Karl Meakin authored Mar 05, 2022
  
  1d8093fe
- [AArch64] Add test for i128 overflow/saturation ops (NFC) · f3e254b3
  Karl Meakin authored Mar 04, 2022
  f3e254b3
- [SDAG] fold bitwise logic with shifted operands · f4b53972
  Sanjay Patel authored Mar 04, 2022
  f4b53972
- [AArch64][x86] add tests for bitwise logic + shifts; NFC · 90c2330c
  Sanjay Patel authored Mar 04, 2022
  90c2330c
Mar 04, 2022
- Revert "[AArch64] Async unwind - function prologues" · 85c53c70
  Hans Wennborg authored Mar 04, 2022
  85c53c70
- [AArch64] Use simd mov to materialize big fp constants · 7a605ab7
  zhongyunde authored Mar 04, 2022
  7a605ab7
- Extend `performANDCSELCombine` to `performANDORCSELCombine` · 43a0016f
  Karl Meakin authored Feb 16, 2022
  43a0016f
- [AArch64] Turn UZP1 with undef operand into truncate · e348b09b
  David Green authored Mar 04, 2022
  e348b09b
- [AArch64] Improve access to fixed-width object when stack has SVE. · 7c65d228
  Sander de Smalen authored Mar 03, 2022
  7c65d228
- [AArch64] NFC: Add test for access to fixed-width stack object when stack has SVE. · d363bdda
  Sander de Smalen authored Mar 01, 2022
  d363bdda
- [AArch64] Additional insert-subvector codegen tests. NFC · 04661a4d
  David Green authored Mar 04, 2022
  
  04661a4d
Mar 03, 2022
- [AArch64][x86] add tests for rotate/funnel combines; NFC · 74a65e38
  Sanjay Patel authored Mar 03, 2022
  
  74a65e38
- [AArch64] Use first op of FADDPv* instead of implicit def. · 0f261256
  Florian Hahn authored Mar 03, 2022
  0f261256
- [AArch64] Allow copying of SVE registers in Streaming SVE · e4fa8291
  Cullen Rhodes authored Mar 03, 2022
  e4fa8291