Commits · de8451fe4d373b8fd1f8e4bec32e970268c7ac49 · Roger Ferrer / llvm-epi · GitLab

Feb 04, 2020
- GlobalISel: Fold SmallVector resizes into constructors · de8451fe
  Matt Arsenault authored Feb 04, 2020
  
  de8451fe
- [X86] Fix missing load latencies (PR36894) · f25a2a3d
  Simon Pilgrim authored Feb 04, 2020
  f25a2a3d
- [BFI] Add a debug check for unknown block queries. · 803dd6fe
  Hiroshi Yamauchi authored Feb 03, 2020
  803dd6fe
- [InstCombine] add FIXME comment to shuffle transform; NFC · dc42ff66
  Sanjay Patel authored Feb 04, 2020
  dc42ff66
- Separately track input and output denormal mode · a3c814d2
  Matt Arsenault authored Nov 06, 2019
  a3c814d2
- [X86] -fpatchable-function-entry=N,0: place patch label after ENDBR{32,64} · 8ff86fcf
  Fangrui Song authored Jan 30, 2020
  8ff86fcf
- [ARM] Correct missing newline after outputting .tlsdescseq directive. · a05566c9
  David Spickett authored Feb 04, 2020
  a05566c9
- [BPF] handle typedef of struct/union for CO-RE relocations · 6d07802d
  Yonghong Song authored Feb 01, 2020
  6d07802d
- PowerPC: Remove redundancy in ternary for predicate selection · b8dc54cf
  Justin Hibbits authored Feb 04, 2020
  b8dc54cf
- [ARM][AsmParser] Make assembly directives case insensitive · 95c95a94
  David Spickett authored Jan 27, 2020
  95c95a94
- [VE] half fptrunc+store&load+fpext · 3ed12232
  Kazushi (Jam) Marukawa authored Feb 04, 2020
  3ed12232
- [SystemZ] Support -msoft-float · 563e8479
  Jonas Paulsson authored Jan 04, 2020
  563e8479
- Revert "DebugInfo: Check DW_OP_convert in loclists with Split DWARF" · f75301d1
  Nico Weber authored Feb 04, 2020
  f75301d1
- [DebugInfo] Re-instate LiveDebugVariables scope trimming · 41206b61
  Jeremy Morse authored Feb 04, 2020
  41206b61
- [ARM] Make ARM::ArchExtKind use 64-bit underlying type (part 2), NFCI · 65b3b6c0
  Mikhail Maltsev authored Feb 04, 2020
  65b3b6c0
- [InstCombine] fix operands of shouldChangeType() for casted phi transform · 0cf0be99
  Sanjay Patel authored Feb 04, 2020
  0cf0be99
- [yaml2obj/obj2yaml] - Add support for the SHT_LLVM_CALL_GRAPH_PROFILE section. · bec54e46
  Georgii Rymar authored Jan 31, 2020
  bec54e46
- [ARM] Make ARM::ArchExtKind use 64-bit underlying type, NFCI · 7128aace
  Mikhail Maltsev authored Feb 04, 2020
  7128aace
- [NFC] Fix some spelling mistakes to test pushing to GH. · abada503
  Filipe Cabecinhas authored Oct 29, 2019
  
  abada503
- [DAG] OptLevelChanger - fix uninitialized variable analyzer warning (PR44471) · 3dd688a9
  Simon Pilgrim authored Feb 04, 2020
  3dd688a9
- Revert "[X86] Use X86ISD::SUB instead of X86ISD::CMP in some places." · d2b6ac6c
  Kadir Cetinkaya authored Feb 04, 2020
  d2b6ac6c
- [ARM][VecReduce] Force expand vector_reduce_fmin · 362d00e0
  David Green authored Feb 04, 2020
  362d00e0
- [NFC] Encapsulate MemOp logic · b8144c05
  Guillaume Chatelet authored Feb 04, 2020
  b8144c05
- [ValueTracking] Let isGuaranteedToBeUndefOrPoison look into operands of icmp · dd7d6102
  Juneyoung Lee authored Feb 04, 2020
  
  dd7d6102
- Let isGuaranteedNotToBeUndefOrPoison consider PHINode with constant values · 36272d5f
  Juneyoung Lee authored Feb 04, 2020
  
  36272d5f
- [X86] Remove unneeded code that looks for (and (i8 (X86setcc_c)) · cd14b4a6
  Craig Topper authored Feb 03, 2020
  cd14b4a6
- [GVN] Add GVNOption to control load-pre more fine-grained. · e53bbf12
  Thomas Raoux authored Feb 03, 2020
  e53bbf12
- [X86] Remove some uncovered and possibly broken code from combineZext. · 4581d974
  Craig Topper authored Feb 03, 2020
  4581d974
- [X86] Use X86ISD::SUB instead of X86ISD::CMP in some places. · 8413116b
  Craig Topper authored Feb 03, 2020
  8413116b
- [X86] Don't emit two X86ISD::COMI/UCOMI nodes when handling comi/ucomi intrinsics. · c3a47221
  Craig Topper authored Feb 03, 2020
  c3a47221
- DebugInfo: Hash DW_OP_convert in loclists when using Split DWARF · 1ced28cb
  David Blaikie authored Feb 03, 2020
  1ced28cb
- DebugInfo: Simplify emitDebugLocEntry by never passing a null CU · 031f83fb
  David Blaikie authored Feb 03, 2020
  
  031f83fb
- [X86] Update the haswell and broadwell scheduler information for gather instructions · c7768ce5
  Craig Topper authored Feb 03, 2020
  c7768ce5
- Revert "Reland "[AArch64] Fix data race on RegisterBank initialization."" · 9a40670a
  Huihui Zhang authored Feb 03, 2020
  9a40670a
- Reland "[AArch64] Fix data race on RegisterBank initialization." · 9c726e9d
  Huihui Zhang authored Feb 03, 2020
  9c726e9d
- [AArch64][GlobalISel] Fold G_XOR into TB(N)Z bit calculation · 9effe38b
  Jessica Paquette authored Feb 03, 2020
  9effe38b
Feb 03, 2020
- [ANDGPU] getMemOperandsWithOffset: support BUF non-stack-access instructions... · 2252cac6
  Jay Foad authored Dec 20, 2019
  2252cac6
- [AArch64][GlobalISel] Fold G_SHL into TB(N)Z bit calculation · 37910fd0
  Jessica Paquette authored Feb 03, 2020
  37910fd0
- AMDGPU: Add flag to control mem intrinsic expansion · 7d3aace3
  Matt Arsenault authored Jan 31, 2020
  7d3aace3
- [NFC] Factor out function to detect if an attribute has an argument. · 15f54d34
  Tyker authored Feb 02, 2020
  
  15f54d34