Commits · deb8f8bcf31540c657716ea5242183b0792702a1 · Roger Ferrer / llvm-epi · GitLab

Sep 17, 2020
- [SVE][CodeGen] Lower floating point -> integer conversions · f7185b27
  Kerry McLaughlin authored Sep 17, 2020
  f7185b27
- [AArch64] Add -mmark-bti-property flag. · f70baaf7
  Daniel Kiss authored Sep 16, 2020
  f70baaf7
- Revert "[AArch64] Add -mmark-bti-property flag." · 60e244f8
  Daniel Kiss authored Sep 17, 2020
  60e244f8
- [AArch64] Add -mmark-bti-property flag. · 95e43f84
  Daniel Kiss authored Sep 16, 2020
  95e43f84
Sep 16, 2020
- [AArch64][GlobalISel] Make G_BUILD_VECTOR os <16 x s8> legal. · 6ad33d83
  Amara Emerson authored Sep 16, 2020
  
  6ad33d83
- [AArch64][GlobalISel] Refactor + improve CMN, ADDS, and ADD emit functions · ffe9986d
  Jessica Paquette authored Sep 10, 2020
  ffe9986d
Sep 15, 2020
- [AArch64][SVE] Add lowering for llvm fsqrt · d417488e
  Muhammad Asif Manzoor authored Sep 15, 2020
  d417488e
- [AArch64] Statepoint support for AArch64. · e6bc7037
  Philip Reames authored Sep 14, 2020
  e6bc7037
Sep 14, 2020
- [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. · c193a689
  Craig Topper authored Sep 14, 2020
  c193a689
Sep 12, 2020
- [MachineScheduler] Fix operand scheduling for pre/post-increment loads · 2e61cd12
  Evgeny Leviant authored Sep 12, 2020
  2e61cd12
- [Intrinsics] define semantics for experimental fmax/fmin vector reductions · 3a8ea860
  Sanjay Patel authored Sep 12, 2020
  3a8ea860
Sep 11, 2020
- [MC] [Win64EH] Canonicalize ARM64 unwind opcodes · 700fbe59
  Martin Storsjö authored Sep 07, 2020
  700fbe59
- Remove unused variable introduce in 0448d11a causing build · 03539619
  Zarko Todorovski authored Sep 10, 2020
  03539619
- [AArch64][GlobalISel] Don't emit a branch for a fallthrough G_BR at -O0. · 0448d11a
  Amara Emerson authored Sep 10, 2020
  0448d11a
Sep 10, 2020
- Mark FMOV constant materialization as being as cheap as a move. · 3d9c85e4
  Owen Anderson authored Sep 08, 2020
  3d9c85e4
- AArch64MachineFunctionInfo.h - remove unnecessary TargetFrameLowering.h include. NFCI. · 9f830e0a
  Simon Pilgrim authored Sep 10, 2020
  
  9f830e0a
- [SVE][CodeGen] Legalisation of truncate for scalable vectors · cd89f5c9
  Kerry McLaughlin authored Sep 10, 2020
  cd89f5c9
- [NFC] Move definition of variable now only used in debug builds · 52f08377
  Jordan Rupprecht authored Sep 09, 2020
  
  52f08377
- [AArch64][GlobalISel] Share address mode selection code for memops · 480e7f43
  Jessica Paquette authored Sep 09, 2020
  480e7f43
Sep 09, 2020
- [GlobalISel] Enable usage of BranchProbabilityInfo in IRTranslator. · e5784ef8
  Amara Emerson authored Aug 28, 2020
  e5784ef8
- [GlobalISel] Rewrite the elide-br-by-swapping-icmp-ops combine to do less. · cc76da7a
  Amara Emerson authored Aug 24, 2020
  cc76da7a
Sep 08, 2020
- [AARCH64][RegisterCoalescer] clang miscompiles zero-extension to long long · 8ee1419a
  Simon Wallis authored Sep 08, 2020
  8ee1419a
Sep 07, 2020
- Reland [SimplifyCFG][LoopRotate] SimplifyCFG: disable common instruction... · bb7d3af1
  Roman Lebedev authored Sep 07, 2020
  bb7d3af1
Sep 04, 2020
- [AArch64][SVE] Add lowering for rounding operations · 1ffcbe35
  Muhammad Asif Manzoor authored Sep 04, 2020
  1ffcbe35
Sep 03, 2020
- [AArch64] Add asm directives for the remaining SEH unwind codes · f5e2ea9a
  Martin Storsjö authored Aug 16, 2020
  f5e2ea9a
Sep 02, 2020
- [AArch64][SVE] Preserve full vector regs over EH edge. · f13beac5
  Sander de Smalen authored Sep 02, 2020
  f13beac5
Sep 01, 2020
- Revert "Revert "[GlobalISel] Fold xor(cmp(pred, _, _), 1) ->... · 520ab710
  Amara Emerson authored Sep 01, 2020
  520ab710
- Revert "[GlobalISel] Fold xor(cmp(pred, _, _), 1) -> cmp(inverse(pred), _, _)"... · 8693ddc7
  Jordan Rupprecht authored Sep 01, 2020
  8693ddc7
- Revert "Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain"" · 5987da87
  Owen Anderson authored Sep 01, 2020
  5987da87
- [AArch64][GlobalISel] Optimize away a Not feeding a brcond by using tbz instead of tbnz. · 5ded4442
  Amara Emerson authored Aug 22, 2020
  5ded4442
- Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain" · bc9a29b9
  Paul Walker authored Sep 01, 2020
  bc9a29b9
Aug 30, 2020
- [FastISel] update to use intrinsic's isCommutative(); NFC · 2d3e1281
  Sanjay Patel authored Aug 30, 2020
  2d3e1281
Aug 29, 2020
- [AArch64] Generate and parse SEH assembly directives · 5b86d130
  Martin Storsjö authored Aug 07, 2020
  5b86d130
- [Target][AArch64] Allow for char as int8_t in AArch64AsmParser.cpp · 672d7836
  Rainer Orth authored Aug 29, 2020
  672d7836
Aug 28, 2020
- [Attributes] Add a method to check if an Attribute has AttrKind None. Use... · aab90384
  Craig Topper authored Aug 28, 2020
  aab90384
- Strength-reduce SmallVectors to arrays. NFCI. · 8782c727
  Benjamin Kramer authored Aug 28, 2020
  
  8782c727
- [SVE] Make ElementCount members private · f4257c58
  David Sherwood authored Aug 14, 2020
  f4257c58
- [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported · d678e14c
  Ties Stuij authored Aug 28, 2020
  d678e14c
Aug 27, 2020
- [ARM][BFloat16] Change types of some Arm and AArch64 bf16 intrinsics · ae1396c7
  Mikhail Maltsev authored Aug 27, 2020
  ae1396c7
- Reapply D70800: Fix AArch64 AAPCS frame record chain · e9d9a612
  Owen Anderson authored Aug 26, 2020
  e9d9a612