Commits · dee0702b2a9d3769a32a420c36fddef556672a06 · Roger Ferrer / llvm-epi · GitLab

Sep 06, 2019
- [MIR] Change test case to read from stdin instead of file · dee0702b
  Mikael Holmen authored Sep 06, 2019
  dee0702b
- [X86] Add tests for extending and truncating between v16i8 and v16i64 with... · 463c8e5e
  Craig Topper authored Sep 06, 2019
  463c8e5e
- AMDGPU/GlobalISel: Fix load/store of types in other address spaces · 4d906252
  Matt Arsenault authored Sep 06, 2019
  4d906252
- GlobalISel/TableGen: Fix handling of EXTRACT_SUBREG constraints · 9ceb6edf
  Matt Arsenault authored Sep 06, 2019
  9ceb6edf
- AMDGPU: Allow getMemOperandWithOffset to analyze stack accesses · 60c8b8bc
  Matt Arsenault authored Sep 05, 2019
  60c8b8bc
- AMDGPU: Fix emitting multiple stack loads for stack passed workitems · 59ff77ee
  Matt Arsenault authored Sep 05, 2019
  59ff77ee
- [AArch64] Add testcase for codegen for sdiv by 2. · 9dd453ce
  Eli Friedman authored Sep 05, 2019
  9dd453ce
Sep 05, 2019
- [MIR] MIRNamer pass for improving MIR test authoring experience. · dc97ca9f
  Puyan Lotfi authored Sep 05, 2019
  dc97ca9f
- Recommit "[AArch64][GlobalISel] Teach AArch64CallLowering to handle basic sibling calls" · 20e86670
  Jessica Paquette authored Sep 05, 2019
  20e86670
- [IfConversion] Fix diamond conversion with unanalyzable branches. · cae1e47f
  Eli Friedman authored Sep 05, 2019
  cae1e47f
- [X86] Enable BuildSDIVPow2 for i16. · 0fde4121
  Craig Topper authored Sep 05, 2019
  0fde4121
- [X86] Override BuildSDIVPow2 for X86. · b8d6ba3c
  Craig Topper authored Sep 05, 2019
  b8d6ba3c
- [x86] fix horizontal math bug exposed by improved demanded elements analysis (PR43225) · 10412a69
  Sanjay Patel authored Sep 05, 2019
  10412a69
- [X86] Remove unneeded CHECK lines from a test. NFC · 673da001
  Craig Topper authored Sep 05, 2019
  673da001
- [x86] add test for horizontal math bug (PR43225); NFC · 38565123
  Sanjay Patel authored Sep 05, 2019
  38565123
- [Hexagon] Fix type in HexagonTargetLowering::ReplaceNodeResults · 0ce93194
  Krzysztof Parzyszek authored Sep 05, 2019
  0ce93194
- [X86][SSE] EltsFromConsecutiveLoads - ignore non-zero offset base loads (PR43227) · 29361c70
  Simon Pilgrim authored Sep 05, 2019
  29361c70
- [ARM] Fixup the creation of VPT blocks · 83a33412
  David Green authored Sep 05, 2019
  83a33412
- [X86][SSE] Add (failing) test case for PR43227 · 215910ee
  Simon Pilgrim authored Sep 05, 2019
  215910ee
- [MIPS GlobalISel] Select G_FENCE · a4bfc8df
  Petar Avramovic authored Sep 05, 2019
  a4bfc8df
- [MIPS GlobalISel] Select llvm.trap intrinsic · f5c7fe07
  Petar Avramovic authored Sep 05, 2019
  f5c7fe07
- [MIPS GlobalISel] Lower SRet pointer arguments · d2574d79
  Petar Avramovic authored Sep 05, 2019
  d2574d79
- Revert rL370996 from llvm/trunk: [AArch64][GlobalISel] Teach... · 071287c5
  Simon Pilgrim authored Sep 05, 2019
  071287c5
- [SystemZ] Recognize INLINEASM_BR in backend · 82185878
  Jonas Paulsson authored Sep 05, 2019
  82185878
- [LLVM][Alignment] Make functions using log of alignment explicit · aff45e4b
  Guillaume Chatelet authored Sep 05, 2019
  aff45e4b
- AMDGPU: Add intrinsics for address space identification · f581d575
  Matt Arsenault authored Sep 05, 2019
  f581d575
- AMDGPU/GlobalISel: Restore insert point when getting aperture · 69b1a2ae
  Matt Arsenault authored Sep 05, 2019
  69b1a2ae
- AMDGPU/GlobalISel: Fix placeholder value used for addrspacecast · 25156ae7
  Matt Arsenault authored Sep 05, 2019
  25156ae7
- AMDGPU/GlobalISel: Fix assert on load from constant address · d51a3746
  Matt Arsenault authored Sep 05, 2019
  d51a3746
- [mir-canon][NFC] Adding -verify-machineinstrs to mir-canon tests. · 6d3ea2d9
  Puyan Lotfi authored Sep 05, 2019
  6d3ea2d9
- Use -mtriple to fix AMDGPU test sensitive to object file format · 29ccc852
  Reid Kleckner authored Sep 05, 2019
  29ccc852
- [AArch64][GlobalISel] Teach AArch64CallLowering to handle basic sibling calls · b78324fc
  Jessica Paquette authored Sep 04, 2019
  b78324fc
Sep 04, 2019
- AMDGPU/GlobalISel: Select G_BITREVERSE · 2df41a8e
  Matt Arsenault authored Sep 04, 2019
  2df41a8e
- GlobalISel: Add basic legalization for G_BITREVERSE · 5ff310e2
  Matt Arsenault authored Sep 04, 2019
  5ff310e2
- [MemorySSA] Re-enable MemorySSA use. · 6da79ce1
  Alina Sbirlea authored Sep 04, 2019
  6da79ce1
- [X86] Pre-commit test cases and test run line changes for D67087 · f0081dac
  Craig Topper authored Sep 04, 2019
  f0081dac
- AMDGPU: Handle frame index expansion with no free SGPRs pre gfx9 · 84489b34
  Matt Arsenault authored Sep 04, 2019
  84489b34
- GlobalISel: Add G_BITREVERSE · 70becc20
  Matt Arsenault authored Sep 04, 2019
  70becc20
- AMDGPU/GlobalISel: Make 16-bit constants legal · d9af712d
  Matt Arsenault authored Sep 04, 2019
  d9af712d
- [Hexagon] Improve generated code for test-if-bit-clear, one more time · 08a09822
  Krzysztof Parzyszek authored Sep 04, 2019
  08a09822