Commits · df2ab917ad82577fc9efe128f0819123518d9f64 · Roger Ferrer / llvm-epi · GitLab

Aug 23, 2016
- GlobalISel: extend legalizer interface to handle multiple types. · a01bece1
  Tim Northover authored Aug 23, 2016
  a01bece1
- GlobalISel: mark pointer casts legal on AArch64. · 456a3c03
  Tim Northover authored Aug 23, 2016
  456a3c03
- GlobalISel: legalize 1-bit load/store and mark 8/16 bit variants legal on AArch64. · 3c73e367
  Tim Northover authored Aug 23, 2016
  3c73e367
- [Hexagon] Packetize return value setup with the return instruction · 38e2ccc8
  Krzysztof Parzyszek authored Aug 23, 2016
  38e2ccc8
- [lanai] Use const instead of constexpr · 8ed1cd29
  Jacques Pienaar authored Aug 23, 2016
  8ed1cd29
- Fix SystemZ hang caused by r279105 · a4092104
  Elliot Colp authored Aug 23, 2016
  a4092104
- LLVMLanaDesc: Update libdesp. · 708591d2
  NAKAMURA Takumi authored Aug 23, 2016
  708591d2
- Change the target's name, s/LanaiMCTargetDesc/LanaiDesc/g. · 031a6330
  NAKAMURA Takumi authored Aug 23, 2016
  031a6330
- [ARM] Generate consistent frame records for Thumb2 · 9aa6f010
  Oliver Stannard authored Aug 23, 2016
  9aa6f010
- Revert "(HEAD -> master, origin/master, origin/HEAD) CodeGen: Remove... · 7f66202d
  Matthias Braun authored Aug 23, 2016
  7f66202d
- CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses · fd936841
  Matthias Braun authored Aug 23, 2016
  fd936841
- BranchRelaxation: Fix handling of blocks with multiple conditional · 567631bd
  Matt Arsenault authored Aug 23, 2016
  567631bd
- [lanai] Exit early in Mem Alu combiner if sentinel reach. · 0e217190
  Jacques Pienaar authored Aug 23, 2016
  0e217190
Aug 22, 2016
- AMDGPU: Split SILowerControlFlow into two pieces · 78fc9daf
  Matt Arsenault authored Aug 22, 2016
  78fc9daf
- [X86][AVX] Don't use SubVectorBroadcast if there are additional users of the chain (PR29088) · c8ad5c06
  Simon Pilgrim authored Aug 22, 2016
  c8ad5c06
- [mips][ias] Support .dtprel[d]word and .tprel[d]word directives · eb9ed610
  Simon Atanasyan authored Aug 22, 2016
  eb9ed610
- [X86] Only accept SM_SentinelUndef (-1) as an undefined shuffle mask in range · 13fa3301
  Simon Pilgrim authored Aug 22, 2016
  13fa3301
- [X86][SSE] Avoid specifying unused arguments in SHUFPD lowering · 2279e595
  Simon Pilgrim authored Aug 22, 2016
  2279e595
- [mips][microMIPS] Implement BLTZC, BLEZC, BGEZC and BGTZC instructions, fix... · f0ed16ea
  Hrvoje Varga authored Aug 22, 2016
  f0ed16ea
- [X86] Create a new instruction format to handle 4VOp3 encoding. This saves one... · 5f8419da
  Craig Topper authored Aug 22, 2016
  5f8419da
- [X86] Create a new instruction format to handle MemOp4 encoding. This saves... · 9b20fece
  Craig Topper authored Aug 22, 2016
  9b20fece
- [X86] Space out the encodings of X86 instruction formats. I plan to add some... · 61b62e56
  Craig Topper authored Aug 22, 2016
  61b62e56
- [X86] Merge hasVEX_i8ImmReg into the ImmFormat type which had extra unused... · ca0eda3e
  Craig Topper authored Aug 22, 2016
  ca0eda3e
- [X86] Remove ignoreVEX_L from TSFlags. Only the disassembler needs it and the... · 52254123
  Craig Topper authored Aug 22, 2016
  52254123
- Reformat. · 9d0b5312
  NAKAMURA Takumi authored Aug 22, 2016
  9d0b5312
- Untabify. · 59a20649
  NAKAMURA Takumi authored Aug 22, 2016
  59a20649
Aug 21, 2016
- [X86][AVX] Dropped combineShuffle256 - this can now be performed by EltsFromConsecutiveLoads · 67e7e224
  Simon Pilgrim authored Aug 21, 2016
  67e7e224
- [AVX512][FastISel] Do not use K registers in TEST instructions · 9ae797a7
  Guy Blank authored Aug 21, 2016
  9ae797a7
- ARM: Avoid dereferencing end() in ARMFrameLowering::emitEpilogue · 8f44c98d
  Duncan P. N. Exon Smith authored Aug 21, 2016
  8f44c98d
Aug 20, 2016
- GlobalISel: support legalization of G_FCONSTANTs · a11be047
  Tim Northover authored Aug 19, 2016
  a11be047
- GlobalISel: teach legalizer how to handle integer constants. · ea904f94
  Tim Northover authored Aug 19, 2016
  ea904f94
Aug 19, 2016
- [GraphTraits] Make nodes_iterator dereference to NodeType*/NodeRef · b5e0f5ac
  Tim Shen authored Aug 19, 2016
  b5e0f5ac
- [Hexagon] Avoid register dependencies on indirect branches in packetizer · 29a6a2eb
  Krzysztof Parzyszek authored Aug 19, 2016
  29a6a2eb
- [NVPTX] Switch nvptx-use-infer-addrspace to true. · d13880a7
  Justin Lebar authored Aug 19, 2016
  d13880a7
- [Hexagon] Fix subesthetic indentation · fb4c4178
  Krzysztof Parzyszek authored Aug 19, 2016
  fb4c4178
- [Hexagon] Allow i1 values for 'r' constraint in inline-asm · 505eb498
  Krzysztof Parzyszek authored Aug 19, 2016
  505eb498
- [Hexagon] Do not cache alloca instructions during isel · 8849a513
  Krzysztof Parzyszek authored Aug 19, 2016
  8849a513
- [Hexagon] Fixes for new-value jump formation · 3d9946eb
  Krzysztof Parzyszek authored Aug 19, 2016
  3d9946eb
- [Hexagon] Fix a few omissions in HexagonInstrInfo · 5a7bef9c
  Krzysztof Parzyszek authored Aug 19, 2016
  5a7bef9c
- [X86][SSE] Generalised combining to VZEXT_MOVL to any vector size · d7a3782a
  Simon Pilgrim authored Aug 19, 2016
  d7a3782a