Commits · e0dc4ac28f0080a10a51a4627c880ca795f07ba0 · Roger Ferrer / llvm-epi · GitLab

Feb 23, 2022
- [NVPTX] Expose float tys min, max, abs, neg as builtins · e0dc4ac2
  Jakub Chlanda authored Feb 22, 2022
  e0dc4ac2
- [DAGCombine] Extend combineCarryDiamond() · afdaa86b
  Pawe Bylica authored Feb 23, 2022
  afdaa86b
- [NFC][PowerPC] Fix the check-cpu.ll test case. · b3e63ee2
  Stefan Pintilie authored Feb 23, 2022
  b3e63ee2
- [X86] combineX86ShufflesRecursively - don't both widening inputs before... · 87753ceb
  Simon Pilgrim authored Feb 23, 2022
  87753ceb
- [DAG] try to convert multiply to shift via demanded bits · 21d7c3bc
  Sanjay Patel authored Feb 23, 2022
  21d7c3bc
- [X86] combineX86ShuffleChainWithExtract - don't both widening inputs after... · 22d04531
  Simon Pilgrim authored Feb 23, 2022
  22d04531
- [AMDGPU] Split fp min/max atomics test. NFC. · e66b1b73
  Jay Foad authored Feb 23, 2022
  e66b1b73
- [MC][ELF] Use SHF_SUNW_NODISCARD instead of SHF_GNU_RETAIN on Solaris · 365be7ac
  Rainer Orth authored Feb 23, 2022
  365be7ac
- AArch64: clamp UBFX high-bit to 32-bits · 5658d869
  Tim Northover authored Feb 23, 2022
  5658d869
- [RISCV] Avoid infinite loop between DAGCombiner::visitMUL and... · c5bcfb98
  Alex Bradbury authored Feb 23, 2022
  c5bcfb98
- [ARM] Recognize SSAT and USAT from SMIN/SMAX · a10789d6
  David Green authored Feb 23, 2022
  a10789d6
- [RISCV] Add more test for GORCI aliaes in Zbp extension · 34971247
  Lian Wang authored Feb 23, 2022
  34971247
- [RISCV] Supplement more tests for GREVI aliaes in Zbp extension · 7abcb7ba
  Lian Wang authored Feb 23, 2022
  7abcb7ba
- Revert "Revert "[AArch64][GlobalISel] Optimize conjunctions of compares to conditional compares."" · b661470b
  Amara Emerson authored Feb 22, 2022
  b661470b
- [AMDGPU] Pre-commit load/store combine tests. NFC. · 939d62c1
  Stanislav Mekhanoshin authored Feb 22, 2022
  
  939d62c1
- Encode address offsets of basic blocks relative to the end of the previous basic blocks. · 029283c1
  Rahman Lavaee authored Feb 22, 2022
  029283c1
- [AArch64] Alter mull shuffle(ext(..)) combine to work on buildvectors · 774b5715
  David Green authored Feb 22, 2022
  774b5715
Feb 22, 2022
- [SystemZ/z/OS] Add va intrinsics for XPLINK · 30053c14
  Kai Nacke authored Feb 22, 2022
  30053c14
- Revert "[AArch64] Alter mull shuffle(ext(..)) combine to work on buildvectors" · ecb27004
  Reid Kleckner authored Feb 22, 2022
  ecb27004
- [AMDGPU] Extend SILoadStoreOptimizer to handle global saddr loads · 9e055c0f
  Stanislav Mekhanoshin authored Feb 21, 2022
  9e055c0f
- [AMDGPU] Extend SILoadStoreOptimizer to handle global loads · ba17bd26
  Stanislav Mekhanoshin authored Feb 21, 2022
  ba17bd26
- [CodeGen] Add test for PR53990 (NFC) · e075bf6b
  Nikita Popov authored Feb 22, 2022
  
  e075bf6b
- [VE] Split unsupported v512.32 ops · 4fd77129
  Simon Moll authored Feb 22, 2022
  4fd77129
- [SVE] Add isel patterns for SABA/UABA. · 25ed2ab3
  Paul Walker authored Feb 14, 2022
  25ed2ab3
- [x86] add load folding restriction to pushAddIntoCmovOfConsts() · ad7214f2
  Sanjay Patel authored Feb 22, 2022
  ad7214f2
- [AARCH64][DAGCombine] Add combine for negation of CSEL absolute value pattern. · d6a9eec2
  Sunho Kim authored Feb 22, 2022
  d6a9eec2
- [NFC][AARCH64] Add test cases for negation of select · 321a39b7
  Sunho Kim authored Feb 22, 2022
  321a39b7
- [RISCV] Add patterns for vector widening integer reduction instructions · 5acd9c49
  Jianjian GUAN authored Jan 19, 2022
  5acd9c49
- [OpenMP] Ensure offloading sections do not have SHF_ALLOC flag · 456ffd7a
  Joseph Huber authored Feb 21, 2022
  456ffd7a
- [RISCV] Add more tests for SHLFI and UNSHFLI aliaes in Zbp extension · 294072e1
  Lian Wang authored Feb 22, 2022
  294072e1
Feb 21, 2022
- [RISCV] Optimize tail agnostic vmv.s.x which don't need to select tail value. · f7dfc5d1
  Zakk Chen authored Feb 21, 2022
  f7dfc5d1
- [AMDGPU] Regenerate tests to include -NEXT. NFC. · 3a17a817
  Vang Thao authored Feb 21, 2022
  
  3a17a817
- [x86] add tests for rmw add with cmov; NFC · 6766ece1
  Sanjay Patel authored Feb 21, 2022
  
  6766ece1
- [RISCV] Teach shouldSinkOperands to sink splat operands of vp.fma intrinsics. · 90d24055
  Craig Topper authored Feb 21, 2022
  90d24055
- [ARM] Addition SSAT/USAT tests for min/max patterns. NFC · 4d5b020d
  David Green authored Feb 21, 2022
  
  4d5b020d
- [AArch64] Alter mull shuffle(ext(..)) combine to work on buildvectors · 9fc1a0dc
  David Green authored Feb 21, 2022
  9fc1a0dc
- MIR: Start diagnosing too many operands on an instruction · 9c7ca51b
  Matt Arsenault authored Feb 18, 2022
  9c7ca51b
- [AArch64][RISCV][x86] add tests for funnel shift with shift logic; NFC · bb850d42
  Sanjay Patel authored Feb 21, 2022
  
  bb850d42
- [X86] use-cr-result-of-dom-icmp-st.ll - add checks without -cgp-icmp-eq2icmp-st flag · d41bf287
  Simon Pilgrim authored Feb 21, 2022
  
  d41bf287
- Revert "[AArch64][GlobalISel] Optimize conjunctions of compares to conditional compares." · 55c181a6
  Florian Hahn authored Feb 21, 2022
  55c181a6