Commits · e7bc73739a00e471cb96527415e6819cebfc7e80 · Roger Ferrer / llvm-epi · GitLab

Jun 25, 2022
- GlobalISel: Make LoadStoreOpt preserve all · e7bc7373
  Matt Arsenault authored Jun 24, 2022
  e7bc7373
- X86: Regenerate test checks · 341e03f9
  Matt Arsenault authored Jun 24, 2022
  
  341e03f9
- CodeGen: Use else if between Value and PseudoSourceValue cases · a397846c
  Matt Arsenault authored Jun 23, 2022
  a397846c
- [DeadArgElim] Replace insert with emplace (NFC) · 6e3d4712
  Pavel Samolysov authored Jun 25, 2022
  
  6e3d4712
- [RISCV][MC] Fold UIMM related code · 529f05cd
  Shao-Ce SUN authored Jun 24, 2022
  529f05cd
- [MCA][unittest] Hot fix for -Wpessimizing-move on test harness · 1f62e245
  Min Hsu authored Jun 24, 2022
  1f62e245
- [MLInliner] No need to invalidate everything post-inlining. · 7ae92a69
  Mircea Trofin authored Jun 24, 2022
  7ae92a69
- [gn build] Port b847692e · 73709fe0
  LLVM GN Syncbot authored Jun 25, 2022
  
  73709fe0
- [gn build] (manually) port 97579dcc (LLVMMCATests) · 012412d1
  Nico Weber authored Jun 24, 2022
  012412d1
- [RISCV] Implement RISCVTTIImpl::getMaxVScale correctly · 4710e789
  Philip Reames authored Jun 24, 2022
  4710e789
- [MCA] Hot fix for -Wmismatched-tags errors on mca::SourceMgr · 87805d6a
  Min Hsu authored Jun 24, 2022
  87805d6a
- [MCA] Allow mca::Instruction-s to be recycled and reused · b847692e
  Min Hsu authored Jun 05, 2022
  b847692e
- [MCA] Introducing incremental SourceMgr and resumable pipeline · 97579dcc
  Min Hsu authored May 30, 2022
  97579dcc
Jun 24, 2022
- [RISCV] Simplify 16 bit index handling in lowerVECTOR_REVERSE [nfc] · a0443dd4
  Philip Reames authored Jun 24, 2022
  a0443dd4
- [RISCV] Replace two calls to getMinRVVVectorSizeInBits in fixed length lowering [nfc] · f1e1c3ce
  Philip Reames authored Jun 24, 2022
  f1e1c3ce
- [RISCV] Replace two calls to getMinRVVVectorSizeInBits with getRealMinVLen [nfc] · f1b1bcdb
  Philip Reames authored Jun 24, 2022
  f1b1bcdb
- [HWASan] Use new IR attribute for communicating unsanitized globals. · f5706640
  Mitch Phillips authored Jun 24, 2022
  f5706640
- [LV][RISCV] Add coverage showing scalable codegen when etype != ELEN · ae8fac6f
  Philip Reames authored Jun 24, 2022
  ae8fac6f
- [Inline] Annotate inline pass name with link phase information for analysis. · e0d06959
  Mingming Liu authored May 12, 2022
  e0d06959
- [OpenMP] Initial parsing and sema support for 'masked taskloop' construct · 42bb88e2
  Fazlay Rabbi authored Jun 24, 2022
  42bb88e2
- [SLP]Improve shuffles cost estimation where possible. · 2faacf61
  Alexey Bataev authored Dec 09, 2021
  2faacf61
- [ObjCopy] Fix type mismatch in writeCodeSignatureData() · 146f486b
  Joshua Root authored Jun 24, 2022
  146f486b
- [GlobalOpt] Perform store->dominated load forwarding for stored once globals · e422c0d3
  Arthur Eubanks authored Jun 18, 2022
  e422c0d3
- [RISCV] Split a vectorizer test runline so that upcoming changes in defaults are visible · 056d6393
  Philip Reames authored Jun 24, 2022
  
  056d6393
- [RISCV] Modify a test line so it exercises the intended configuration once we... · adbe7186
  Philip Reames authored Jun 24, 2022
  adbe7186
- [LV] Create RT checks once VF/IC are selected, track scalar cost. · cb69ba4f
  Florian Hahn authored Jun 24, 2022
  cb69ba4f
- [AMDGPU] gfx11 VOPD instructions MC support · 07b7fada
  Joe Nash authored May 25, 2022
  07b7fada
- [RISCV] Change how we isel (add X, [-4096, -2049]) or (add X, [2048,4095]). · 78a31bb9
  Craig Topper authored Jun 24, 2022
  78a31bb9
- AMDGPU: Clear kill flags when optimizing vcmp save exec sequence · 7736ce1c
  Konstantin Zhuravlyov authored Jun 24, 2022
  7736ce1c
- [SelectionDAG][DAGCombiner] Reuse exist node by reassociate · 8c742056
  chenglin.bi authored Jun 24, 2022
  8c742056
- [InlineCost] Improve debugging experience by adding print about initial inlining cost · b7e7f4e1
  Dawid Jurczak authored Jun 24, 2022
  b7e7f4e1
- [MemoryBuiltins] Accept any value in getInitialValueOfAllocation() (NFC) · 871197d0
  Nikita Popov authored Jun 08, 2022
  871197d0
- [GlobalOpt] Add tests for PR55859 (NFC) · 999aa6bf
  Nikita Popov authored Jun 24, 2022
  
  999aa6bf
- [Binary] Further improve malformed input handling for the OffloadBinary · 1dcbe03c
  Joseph Huber authored Jun 24, 2022
  1dcbe03c
- [gn build] Port 7a3918b5 · 05558c06
  LLVM GN Syncbot authored Jun 24, 2022
  
  05558c06
- [gn build] Port 6546fdbe · f09dad0c
  LLVM GN Syncbot authored Jun 24, 2022
  
  f09dad0c
- [InlineFunction] Slightly clarify noalias scope calculation (NFC) · e523baa6
  Nikita Popov authored Jun 24, 2022
  e523baa6
- [SLP] Add cost model for `llvm.powi.*` intrinsics (REAPPLIED) · 0d417943
  Nabeel Omer authored Jun 22, 2022
  0d417943
- [AA] Export isEscapeSource() API (NFC) · 54eff7da
  Nikita Popov authored Jun 24, 2022
  54eff7da
- [AArch64] Convert vector add(ext, ext) into ext(add(ext, ext)) · 03c65c0d
  David Green authored Jun 24, 2022
  03c65c0d