Commits · e918ba69582bd71ccf706b7c0f103c0b09043f94 · Roger Ferrer / llvm-epi · GitLab

Aug 17, 2021
- [LICM] Drop -licm-n2-threshold option · e918ba69
  Nikita Popov authored Aug 17, 2021
  e918ba69
- [llvm-readobj] Refactor ELFDumper::printAttributes() · 108ba4f4
  Jozef Lawrynowicz authored Aug 17, 2021
  108ba4f4
- [PassBuilder] Use loop-mssa for licm · f58a642d
  Nikita Popov authored Aug 16, 2021
  f58a642d
- [llvm-profgen] Clean up code dealing with multiple binaries · f812c192
  wlei authored Aug 11, 2021
  f812c192
- [InstCombine] add TODO about another min/max fold; NFC · 50c11387
  Sanjay Patel authored Aug 17, 2021
  50c11387
- [InstCombine] add tests for min/max with 'not' ops; NFC · ab8419a6
  Sanjay Patel authored Aug 17, 2021
  
  ab8419a6
- [RISCV] Use RISCV::RVVBitsPerBlock for RGK_ScalableVector in getRegisterBitWidth. · 8f6cea43
  Craig Topper authored Aug 17, 2021
  8f6cea43
- SelectionDAGBuilder::visitInlineAsm - don't dereference dyn_cast<> results. · d7f28850
  Simon Pilgrim authored Aug 17, 2021
  d7f28850
- [AArch64] AArch64DAGToDAGISel::tryReadRegister/tryWriteRegister - don't... · caff2aca
  Simon Pilgrim authored Aug 17, 2021
  caff2aca
- [ARM] ARMDAGToDAGISel::tryReadRegister/tryWriteRegister - don't dereference dyn_cast<> results. · 1e770f03
  Simon Pilgrim authored Aug 17, 2021
  1e770f03
- [AMDGPU] Fix lowering of AMDGPU::G_CTTZ_ZERO_UNDEF to AMDGPU::G_AMDGPU_FFBL_B32 · fb81271e
  Simon Pilgrim authored Aug 17, 2021
  fb81271e
- [VP] Add vector-predicated reduction intrinsics · f3e90472
  Fraser Cormack authored Jun 14, 2021
  f3e90472
- [OpenMP][NFC] Add option to print module after OpenMPOpt for debugging · 339aa765
  Joseph Huber authored Aug 16, 2021
  339aa765
- [SCEVExpander] Stop hoisting IR when reusing phis · 982da7a2
  Philip Reames authored Aug 17, 2021
  982da7a2
- Fix 2: [MCParser] Correctly handle CRLF line ends when consuming line comments · 6d5e31ba
  Tozer authored Aug 17, 2021
  6d5e31ba
- [llvm-objdump] -T: print symbol versions · c56b4cfd
  Fangrui Song authored Aug 17, 2021
  c56b4cfd
- [Object] Move llvm-nm's symbol version utility to ELFObjectFile::readDynsymVersions · 78cb1adc
  Fangrui Song authored Aug 17, 2021
  78cb1adc
- [X86] Lower insertions into upper half of an 256-bit vector as broadcast+blend (PR50971) · 2078c4ec
  Roman Lebedev authored Aug 17, 2021
  2078c4ec
- Fix: [MCParser] Correctly handle CRLF line ends when consuming line comments · ad40cb88
  Tozer authored Aug 17, 2021
  ad40cb88
- [MCParser] Correctly handle CRLF line ends when consuming line comments · 5c6f748c
  Tozer authored Aug 17, 2021
  5c6f748c
- [Bitcode] Remove unused declaration writeBitcodeHeader (NFC) · a14920c0
  Kazu Hirata authored Aug 17, 2021
  a14920c0
- [LIT]Accept cat_64 command name on AIX in shtest · 3c4fad6a
  Jinsong Ji authored Aug 17, 2021
  3c4fad6a
- [SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute · ef198cd9
  Dylan Fleming authored Aug 17, 2021
  ef198cd9
- [ARM] Enable subreg liveness · 52e0cf9d
  David Green authored Aug 17, 2021
  52e0cf9d
- [ARM] Add MQQPR and MQQQQPR spill and reload pseudo instructions · 62e892fa
  David Green authored Aug 17, 2021
  62e892fa
- [InstCombine] remove unused function argument; NFC · e73f4e11
  Sanjay Patel authored Aug 17, 2021
  
  e73f4e11
- [InstCombine] fold signed min/max intrinsics with negated operands · d0975b7c
  Sanjay Patel authored Aug 17, 2021
  d0975b7c
- [InstCombine] add tests for smin/smax intrinsics with negated ops; NFC · 8fb269d9
  Sanjay Patel authored Aug 16, 2021
  
  8fb269d9
- [GlobalISel] Add combine for PTR_ADD with regbanks · fbae3463
  Sebastian Neubauer authored Aug 17, 2021
  fbae3463
- [CodeGenPrepare] The instruction to be sunk should be inserted before its user in a block · 9cfa9b44
  Tiehu Zhang authored Aug 17, 2021
  9cfa9b44
- [DebugInfo][InstrRef] Honour too-much-debug-info cutouts · 708cbda5
  Jeremy Morse authored Aug 17, 2021
  708cbda5
- [AArch64] LowerCONCAT_VECTORS - merge getNumOperands() calls. NFCI. · 895ed640
  Simon Pilgrim authored Aug 17, 2021
  895ed640
- [AggressiveInstCombine] Add shift left instruction to `TruncInstCombine` DAG · 1f3e35b6
  Anton Afanasyev authored Aug 12, 2021
  1f3e35b6
- [Test][AggressiveInstCombine] Add test for shifts · 8f8f9260
  Anton Afanasyev authored Aug 12, 2021
  8f8f9260
- [hwasan] Prevent reordering of tag checks. · 0deedaa2
  Florian Mayer authored Aug 11, 2021
  0deedaa2
- [NFC] Fix typos · 6d952b08
  PeixinQiao authored Aug 17, 2021
  6d952b08
- [X86] [AMX] Replace bitcast with specific AMX intrinsics with X86 specific cast. · bcec4ccd
  Bing1 Yu authored Aug 05, 2021
  bcec4ccd
- AMDGPU: During img instruction ret value construction cater for non int values · ebdb0d09
  David Stuttard authored Feb 05, 2020
  ebdb0d09
- [tests] precommit tests for D107692 · 9790a2a7
  Yunde Zhong authored Aug 17, 2021
  
  9790a2a7
- [AsmParser] Remove MDConstant (NFC) · 8f5e9d65
  Kazu Hirata authored Aug 16, 2021
  8f5e9d65