Commits · e967308da43213c9c61696d77897f1d5dbc9eb94 · Roger Ferrer / llvm-epi · GitLab

May 21, 2019
- Add TargetLoweringInfo hook for explicitly setting the ABI calling convention endianess · e967308d
  Dylan McKay authored May 21, 2019
  e967308d
Mar 13, 2019
- [DAGCombiner] If a TokenFactor would be merged into its user, consider the user later. · d6351340
  Nirav Dave authored Mar 13, 2019
  d6351340
Jan 21, 2019
- [AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough · 5c23410f
  Dylan McKay authored Jan 21, 2019
  5c23410f
- Revert "[AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough" · ce0ab063
  Dylan McKay authored Jan 21, 2019
  ce0ab063
- [AVR] Insert unconditional branch when inserting MBBs between blocks with fallthrough · 33acba43
  Dylan McKay authored Jan 21, 2019
  33acba43
Jan 20, 2019
- [AVR] Fix codegen bug in 16-bit loads · 6afef286
  Dylan McKay authored Jan 20, 2019
  6afef286
- Revert "[AVR] Fix codegen bug in 16-bit loads" · 52846ab0
  Dylan McKay authored Jan 20, 2019
  52846ab0
Jan 18, 2019
- [AVR] Fix codegen bug in 16-bit loads · 77364be4
  Dylan McKay authored Jan 18, 2019
  77364be4
- [ScheduleDAGRRList] Do not preschedule the node has ADJCALLSTACKDOWN parent · e84c729a
  Shiva Chen authored Jan 18, 2019
  e84c729a
- [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL · 7203e00b
  Dylan McKay authored Jan 18, 2019
  7203e00b
Jan 03, 2019
- [AVR] Update integration/blink.ll as we now generate sbi/cbi instructions. · 667838f0
  Nirav Dave authored Jan 03, 2019
  667838f0
Nov 10, 2018
- [AVR] Reorder the CHECK lines in directmem.ll to match current trunk · 6fddb536
  Dylan McKay authored Nov 09, 2018
  6fddb536
Nov 05, 2018
- [AVR] Fix a backend bug that left extraneous operands after expansion · 4c5a5c8d
  Dylan McKay authored Nov 05, 2018
  4c5a5c8d
- [AVR] Disallow the LDDWRdPtrQ instruction with Z as the destination · 9a9ae99b
  Dylan McKay authored Nov 05, 2018
  9a9ae99b
Oct 10, 2018
- [AVR] Fix the 'call.ll' CodeGen test · 30ef1d60
  Dylan McKay authored Oct 10, 2018
  30ef1d60
Sep 01, 2018
- [AVR] Redefine the 'LSL' instruction as an alias of 'ADD' · 45425867
  Dylan McKay authored Sep 01, 2018
  45425867
- [AVR] Define the ROL instruction as an alias of ADC · 8b0f9d2e
  Dylan McKay authored Sep 01, 2018
  8b0f9d2e
Jun 11, 2018
- [AVR] Set trackLivenessAfterRegAlloc · d011869c
  Dylan McKay authored Jun 11, 2018
  d011869c
Mar 20, 2018
- [AVR] Add a regression test for struct return lowering · 212841b7
  Dylan McKay authored Mar 20, 2018
  212841b7
Mar 19, 2018
- [AVR] Lower i128 divisions to runtime library calls · a35ee706
  Dylan McKay authored Mar 19, 2018
  a35ee706
Mar 06, 2018
- [AVR] Remove the earlyclobber flag from LDDWRdYQ · 8f46486c
  Dylan McKay authored Mar 06, 2018
  8f46486c
Mar 05, 2018
- [AVR] Fix the test suite after r326500. · 6119b79a
  Dylan McKay authored Mar 05, 2018
  6119b79a
Feb 09, 2018
- [CodeGen] Unify the syntax of MBB successors in MIR and -debug output · 39ec2e95
  Francis Visoiu Mistrih authored Feb 09, 2018
  39ec2e95
Feb 08, 2018
- [AVR] Fix the testsuite after '%' changed to '$' in MIR · 820553fd
  Dylan McKay authored Feb 08, 2018
  820553fd
- [CodeGen] Print MachineBasicBlock labels using MIR syntax in -debug output · da89d181
  Francis Visoiu Mistrih authored Feb 08, 2018
  da89d181
Jan 19, 2018
- Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) · 1e68724d
  Daniel Neilson authored Jan 19, 2018
  1e68724d
Dec 09, 2017
- [AVR] Fix two CodeGen tests · f7e8ec13
  Dylan McKay authored Dec 09, 2017
  f7e8ec13
- Relax unaligned access assertion when type is byte aligned · 80463fe6
  Dylan McKay authored Dec 09, 2017
  80463fe6
Dec 07, 2017
- [CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register. · a8a83d15
  Francis Visoiu Mistrih authored Dec 07, 2017
  a8a83d15
Dec 04, 2017
- [CodeGen] Unify MBB reference format in both MIR and debug output · 25528d6d
  Francis Visoiu Mistrih authored Dec 04, 2017
  25528d6d
Nov 30, 2017
- [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output · 93ef1458
  Francis Visoiu Mistrih authored Nov 30, 2017
  93ef1458
Nov 24, 2017
- [AVR] Use the short form of 'clr <reg>' · d3972a8f
  Dylan McKay authored Nov 24, 2017
  d3972a8f
Nov 14, 2017
- [AVR] Remove the select-mbb-placement-bug.ll test · 8443bcc8
  Dylan McKay authored Nov 14, 2017
  8443bcc8
Oct 20, 2017
- [AVR] Fix the select-mbb-placement-bug.ll · 6670e424
  Dylan McKay authored Oct 20, 2017
  6670e424
Oct 18, 2017
- [AVR] Fix the select_mbb_placement_bug.ll test · 443695f8
  Dylan McKay authored Oct 18, 2017
  443695f8
Oct 04, 2017
- [AVR] Elaborate LDWRdPtr into `ld r, X++; ld r+1, X` · d00f9c1e
  Dylan McKay authored Oct 04, 2017
  d00f9c1e
- [AVR] Insert JMP for long branches · 39069208
  Dylan McKay authored Oct 04, 2017
  39069208
- [AVR] Fix displacement overflow for LDDW/STDW · c4b002bf
  Dylan McKay authored Oct 04, 2017
  c4b002bf
Sep 26, 2017
- [AVR] Fix the build after setting alignment to 1 in r314179 · f2c83670
  Dylan McKay authored Sep 26, 2017
  f2c83670
Sep 11, 2017
- [AVR] Enable the '__do_copy_data' function · 0fc5fe0a
  Dylan McKay authored Sep 11, 2017
  0fc5fe0a