Commits · ea4359e9228b34156cd453946473bcd581c581f3 · Roger Ferrer / llvm-epi · GitLab

Jan 11, 2018
- PeepholeOptimizer: Fix for vregs without defs · ea4359e9
  Matthias Braun authored Jan 11, 2018
  ea4359e9
- Make internal/private GVs implicitly dso_local. · e4b0231c
  Rafael Espindola authored Jan 11, 2018
  e4b0231c
- Tighten up DIFile verifier for checksums · cc9c8b95
  Paul Robinson authored Jan 11, 2018
  cc9c8b95
- PeepholeOptimizer: Do not form PHI with subreg arguments · 08abcac9
  Matthias Braun authored Jan 11, 2018
  08abcac9
- [arm] Implement Target Operand Flag MIR serialization. · 5223b5d9
  Evgeniy Stepanov authored Jan 11, 2018
  5223b5d9
- [Sink] Really really fix predicate in legality check · efe6a84e
  Fiona Glaser authored Jan 11, 2018
  efe6a84e
- [WebAssemlby] MC: Don't write COMDAT symbols as global imports · d423f0d2
  Sam Clegg authored Jan 11, 2018
  d423f0d2
- [X86] Legalize 128/256 gathers/scatters on KNL by using widening rather than... · 2aac3ee5
  Craig Topper authored Jan 11, 2018
  2aac3ee5
- [WebAssemly] Rename and improve formatting for ctor/dtor test · 0ce22ef7
  Sam Clegg authored Jan 11, 2018
  0ce22ef7
- dag-combine: Transfer debug information when folding (zext (truncate x)) · 29102b30
  Adrian Prantl authored Jan 11, 2018
  29102b30
- [Hexagon] Fix building 64-bit vector from constant values · 240df6fa
  Krzysztof Parzyszek authored Jan 11, 2018
  240df6fa
- [Hexagon] Cast elements to correct type when creating constant vector · 4ef6cfff
  Krzysztof Parzyszek authored Jan 11, 2018
  4ef6cfff
- DAGCombine: Let truncates negate extension through extract-subvector · 999e6c29
  Zvi Rackover authored Jan 11, 2018
  999e6c29
- X86 Tests: Add zext cases in (trunc (subvector)) test. NFC · cf099988
  Zvi Rackover authored Jan 11, 2018
  cf099988
- [X86][SSE] Drop old insertps stack folding test · 8de03567
  Simon Pilgrim authored Jan 11, 2018
  8de03567
- [InstCombine] Apply the fix from r322284 for sin / cos -> tan too · 738e6e7c
  Benjamin Kramer authored Jan 11, 2018
  738e6e7c
- [InstCombine] For cos/sin -> tan copy attributes from cos instead of the · 44993ede
  Benjamin Kramer authored Jan 11, 2018
  44993ede
- [ValueTracking] recognize min/max-of-min/max with notted ops (PR35875) · e63d8dda
  Sanjay Patel authored Jan 11, 2018
  e63d8dda
- [InstCombine] add min3-with-nots test (PR35875); NFC · e0df4650
  Sanjay Patel authored Jan 11, 2018
  e0df4650
- [X86][SSE] Add ISD::VECTOR_SHUFFLE to faux shuffle decoding · 6e6da3f4
  Simon Pilgrim authored Jan 11, 2018
  6e6da3f4
- X86: Fix LowerBUILD_VECTORAsVariablePermute for case Src is smaller than Indices · 3ee66d9c
  Zvi Rackover authored Jan 11, 2018
  3ee66d9c
- [RISCV] Reserve an emergency spill slot for the register scavenger when necessary · 0715d35e
  Alex Bradbury authored Jan 11, 2018
  0715d35e
- Implementation of X86Operand::print. · d037b144
  Andrew V. Tischenko authored Jan 11, 2018
  d037b144
- [Mips] Handle one byte unsupported relocations · 5481c217
  Stefan Maksimovic authored Jan 11, 2018
  5481c217
- [AArch64][SVE] Asm: Negative tests for predicated ADD/SUB register constraints · ba5fd775
  Sander de Smalen authored Jan 11, 2018
  ba5fd775
- [CodeView] Fix the type for a variadic argument · a73fa2a0
  Aaron Smith authored Jan 11, 2018
  a73fa2a0
- [InstCombine] Missed optimization in math expression: sin(x) / cos(x) => tan(x) · e5fbf591
  Dmitry Venikov authored Jan 11, 2018
  e5fbf591
- [X86] Optimize v2i32/v2f32 scatters. · 0b59034b
  Craig Topper authored Jan 11, 2018
  0b59034b
- [AArch64] add tests for notted variants of min/max; NFC · f16fe0f2
  Sanjay Patel authored Jan 10, 2018
  f16fe0f2
Jan 10, 2018
- Revert "AArch64: Fix emergency spillslot being out of reach for large callframes" · e3a8db7b
  Matthias Braun authored Jan 10, 2018
  e3a8db7b
- [SLP] Add/update tests for SLP vectorizer, NFC. · 90e29b81
  Alexey Bataev authored Jan 10, 2018
  90e29b81
- [RISCV] Implement support for the BranchRelaxation pass · 315cd3ac
  Alex Bradbury authored Jan 10, 2018
  315cd3ac
- TargetLoweringBase: The ios simulator has no bzero function. · 725ad0ee
  Matthias Braun authored Jan 10, 2018
  725ad0ee
- [RISCV] Implement branch analysis · e027c93a
  Alex Bradbury authored Jan 10, 2018
  e027c93a
- [RISCV] Add support for llvm.{frameaddress,returnaddress} intrinsics · 70f137b6
  Alex Bradbury authored Jan 10, 2018
  70f137b6
- [RISCV] Add basic support for inline asm constraints · 9330e644
  Alex Bradbury authored Jan 10, 2018
  9330e644
- [RISCV] Support stack frames and offsets up to 32-bits · 9fea4881
  Alex Bradbury authored Jan 10, 2018
  9fea4881
- [RISCV] Support for varargs · c85be0de
  Alex Bradbury authored Jan 10, 2018
  c85be0de
- [SelectionDAG][X86] Explicitly store the scale in the gather/scatter ISD nodes · af4eb172
  Craig Topper authored Jan 10, 2018
  af4eb172
- [MachineOutliner] Outline ADRPs · c191f109
  Jessica Paquette authored Jan 10, 2018
  c191f109