Commits · eab2d4665fdb6a28664c6936d58adc6b35796db1 · Roger Ferrer / llvm-epi · GitLab

Dec 14, 2017
- [SelectionDAG][X86] Improve legalization of v32i1 CONCAT_VECTORS of v16i1 for AVX512F. · eab2d466
  Craig Topper authored Dec 14, 2017
  eab2d466
- [LV] Support efficient vectorization of an induction with redundant casts · 4750c785
  Dorit Nuzman authored Dec 14, 2017
  4750c785
- [X86][AES]: Adding full coverage of MC encoding for the AES and AVXAES isa sets.<NFC> · 448b4af6
  Gadi Haber authored Dec 14, 2017
  448b4af6
- [SelectionDAG] When legalizing the result type of CONCAT_VECTORS, take into... · cf77203f
  Craig Topper authored Dec 14, 2017
  cf77203f
- MC/AsmPrinter: Reduce code duplication. · 5dd72adb
  Matthias Braun authored Dec 14, 2017
  5dd72adb
- MC: Add support for mach-o build_version · 0148c88c
  Matthias Braun authored Dec 14, 2017
  0148c88c
Dec 13, 2017
- [EarlyCSE] recognize swapped variants of abs/nabs as equivalent · 558a4654
  Sanjay Patel authored Dec 13, 2017
  558a4654
- [X86] Add missing MULX32 schedule test · 5af7a6dd
  Simon Pilgrim authored Dec 13, 2017
  5af7a6dd
- CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value · a5315a04
  Yaxun Liu authored Dec 13, 2017
  a5315a04
- [CodeView] Teach clang to emit the .debug$H COFF section. · 048f8f99
  Zachary Turner authored Dec 13, 2017
  048f8f99
- [EarlyCSE] add tests for swapped abs/nabs; NFC · 37373dd5
  Sanjay Patel authored Dec 13, 2017
  37373dd5
- [X86] Add CLWB schedule test · 49dbfe7d
  Simon Pilgrim authored Dec 13, 2017
  49dbfe7d
- [WebAssembly] Use bitfield types in wasm YAML representation · 0fc5599f
  Sam Clegg authored Dec 13, 2017
  0fc5599f
- Reverting [JumpThreading] Preservation of DT and LVI across the pass · 580bc3c8
  Brian M. Rzycki authored Dec 13, 2017
  580bc3c8
- [EarlyCSE] recognize commuted and swapped variants of min/max as equivalent (PR35642) · 3c7a35de
  Sanjay Patel authored Dec 13, 2017
  3c7a35de
- [WebAssembly] Add linking metatdata test coverage for wasm2yaml · 75f8360e
  Sam Clegg authored Dec 13, 2017
  75f8360e
- [X86] Move ADX schedule tests out of schedule-x86_64.ll · 14318c5b
  Simon Pilgrim authored Dec 13, 2017
  14318c5b
- AMDGPU: Partially fix disassembly of MIMG instructions · cad7fa85
  Matt Arsenault authored Dec 13, 2017
  cad7fa85
- [JumpThreading] Preservation of DT and LVI across the pass · d989af98
  Brian M. Rzycki authored Dec 13, 2017
  d989af98
- [GVNHoist] Fix: PR35222 gvn-hoist incorrectly erases load · 49c03b11
  Aditya Kumar authored Dec 13, 2017
  49c03b11
- Ignore metainstructions during the shrink wrap analysis · 46af7316
  Adrian Prantl authored Dec 13, 2017
  46af7316
- [dsymutil][test] Fix failing test when no lipo binary available · ce5930af
  Jonas Devlieghere authored Dec 13, 2017
  ce5930af
- [X86] Add JCC/JECXZ/JECXZ/JRCXZ/LOOP schedule tests · f02a39c3
  Simon Pilgrim authored Dec 13, 2017
  f02a39c3
- Regenerate test-shrink.ll test results. NFC · a402e514
  Amaury Sechet authored Dec 13, 2017
  a402e514
- [dsymutil] Re-enable threading · 2fbee4f8
  Jonas Devlieghere authored Dec 13, 2017
  2fbee4f8
- [X86] Add RET/RETF schedule tests · 542a7118
  Simon Pilgrim authored Dec 13, 2017
  542a7118
- [X86] Add POP/PUSH schedule tests · c1bd968c
  Simon Pilgrim authored Dec 13, 2017
  c1bd968c
- Reverted r320229. It broke tests on builder llvm-clang-x86_64-expensive-checks-win. · 9dee3f0a
  Galina Kistanova authored Dec 13, 2017
  9dee3f0a
- [X86] Add PREFETCH schedule tests · 0bd31a83
  Simon Pilgrim authored Dec 13, 2017
  0bd31a83
- [X86] Add XCHG schedule tests · 1df18ee3
  Simon Pilgrim authored Dec 13, 2017
  1df18ee3
- [X86] Add MOVNTI schedule tests · 9d9f1701
  Simon Pilgrim authored Dec 13, 2017
  9d9f1701
- [PowerPC] MachineSSA pass to reduce the number of CR-logical operations · 6f590bf8
  Nemanja Ivanovic authored Dec 13, 2017
  6f590bf8
- [X86] Add ENTER/LEAVE schedule tests · 88e6f83f
  Simon Pilgrim authored Dec 13, 2017
  88e6f83f
- [X86] Add IMUL schedule tests · cef5b64f
  Simon Pilgrim authored Dec 13, 2017
  cef5b64f
- [X86] Add RDMSR/WRMSR, RDPMC + RDTSC/RDTSCP schedule tests · f00ea1b4
  Simon Pilgrim authored Dec 13, 2017
  f00ea1b4
- [X86] Add ARPL/BOUND schedule tests · 46ec195d
  Simon Pilgrim authored Dec 13, 2017
  46ec195d
- [RISCV] Define sfence.vma InstAliases to match the GNU RISC-V tools · 845e5dce
  Alex Bradbury authored Dec 13, 2017
  845e5dce
- [X86][SSE] MOVMSK only uses the sign bit from each vector element · f51f4d36
  Simon Pilgrim authored Dec 13, 2017
  f51f4d36
- [RISCV] Implement floating point assembler pseudo instructions · fa7e4ec8
  Alex Bradbury authored Dec 13, 2017
  fa7e4ec8
- Reintroduce r320049, r320014 and r319894. · e0edb664
  Igor Laevsky authored Dec 13, 2017
  e0edb664