Commits · ee51d851eae53c42505f95e59738450f48b7f345 · Roger Ferrer / llvm-epi · GitLab

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May 14, 2019
- [AMDGPU][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases · ee51d851
  Dmitry Preobrazhensky authored May 14, 2019
  ee51d851
- [LVI][CVP] Add support for abs/nabs select pattern flavor · 48c4e4fa
  Nikita Popov authored May 14, 2019
  48c4e4fa
- [MemorySSA] LoopSimplify preserves MemorySSA only when flag is flipped. · 80c6e796
  Alina Sbirlea authored May 14, 2019
  80c6e796
- [IndVars] Extend reasoning about loop invariant exits to non-header blocks · bd8d3091
  Philip Reames authored May 14, 2019
  bd8d3091
- Support FNeg in SpeculativeExecution pass · 7c5c0c9f
  Cameron McInally authored May 14, 2019
  7c5c0c9f
- [Test] Autogen a test for ease of later changing · bbe4ff10
  Philip Reames authored May 14, 2019
  bbe4ff10
- [AMDGPU] Fixed handling of imemdiate i1 literals · 05791d90
  Stanislav Mekhanoshin authored May 14, 2019
  05791d90
- [AMDGPU] gfx1010 Strengthen some SMEM WAR hazard unit tests. NFC. · 7b200326
  Stanislav Mekhanoshin authored May 14, 2019
  7b200326
- [X86] Disable shouldFoldConstantShiftPairToMask for scalar shifts on AMD targets (PR40758) · c2d9cfd9
  Simon Pilgrim authored May 14, 2019
  c2d9cfd9
- [AArch64][SVE2] Asm: add SQRDMLAH/SQRDMLSH instructions · 3b917019
  Cullen Rhodes authored May 14, 2019
  3b917019
- [AArch64][SVE2] Asm: add integer multiply-add/subtract (indexed) instructions · e029da46
  Cullen Rhodes authored May 14, 2019
  e029da46
- Replace lit feature keyword 'not_COFF' with 'uses_COFF'. · ac2f5a61
  Paul Robinson authored May 14, 2019
  ac2f5a61
- DWARF v5: emit DW_AT_addr_base if DW_AT_low_pc references .debug_addr · 2f6ef2fc
  Fangrui Song authored May 14, 2019
  2f6ef2fc
- [PowerPC] Custom lower known CR bit spills · 22561972
  Lei Huang authored May 14, 2019
  22561972
- [lit][tests]Add feature libcxx-used and use it in llvm-*-fuzzer tests · fe4f6d53
  Xing Xue authored May 14, 2019
  fe4f6d53
- TableGen: support #ifndef in addition to #ifdef. · 717b62a1
  Tim Northover authored May 14, 2019
  717b62a1
- Reinstate "FileCheck [5/12]: Introduce regular numeric variables" · 7b4ecdd3
  Thomas Preud'homme authored May 14, 2019
  7b4ecdd3
- AArch64: support binutils-like things on arm64_32. · ff6875ac
  Tim Northover authored May 14, 2019
  ff6875ac
- GlobalOpt: do not promote globals used atomically to constants. · ed9117f8
  Tim Northover authored May 14, 2019
  ed9117f8
- [test]Make test work on Windows · ce0da8ba
  James Henderson authored May 14, 2019
  ce0da8ba
- [IRTranslator] Don't hardcode GEP index type · a568222d
  Diana Picus authored May 14, 2019
  a568222d
- Revert "FileCheck [5/12]: Introduce regular numeric variables" · 00439368
  Thomas Preud'homme authored May 14, 2019
  00439368
- [X86] Prefer locked stack op over mfence for seq_cst 64-bit stores on 32-bit targets · 3098e44d
  Philip Reames authored May 14, 2019
  3098e44d
- [PowerPC][NFC] Fix typos in triples · b7b3d866
  Jinsong Ji authored May 14, 2019
  b7b3d866
- [X86] Use X86 instead of X32 as a check prefix in atomic-idempotent.ll. NFC · cc761e6f
  Craig Topper authored May 14, 2019
  cc761e6f
- [SDAG, x86] allow targets to override test for binop opcodes · 3a13d970
  Sanjay Patel authored May 14, 2019
  3a13d970
- [coroutines] Fix spills of static array allocas · d64455cd
  Gor Nishanov authored May 13, 2019
  d64455cd
May 13, 2019
- [Pass Pipeline][NFC] Add a test prior to committing D61726 · 1d662316
  Nemanja Ivanovic authored May 13, 2019
  1d662316
- [JITLink][MachO] Honor the no-dead-strip flag on nlist entries. · 56baade1
  Lang Hames authored May 13, 2019
  56baade1
- [WebAssembly] Don't assume that zext/sext result is i32/i64 in fast isel (PR41841) · 323dc634
  Nikita Popov authored May 13, 2019
  323dc634
- [AMDGPU] gfx1010 tests. NFC. · d9930d49
  Stanislav Mekhanoshin authored May 13, 2019
  d9930d49
- Revert [X86] Avoid SFB - Fix inconsistent codegen with/without debug info · 91a9d4ef
  Robert Lougher authored May 13, 2019
  91a9d4ef
- [InstCombine] try harder to form rotate (funnel shift) (PR20750) · 760f61ab
  Sanjay Patel authored May 13, 2019
  760f61ab
- [TargetLowering] Handle multi depth GEPs w/ inline asm constraints · c33f754e
  Nick Desaulniers authored May 13, 2019
  c33f754e
- [InstCombine] add tests for rotates with narrow shift amount (PR20750); NFC · cb8957f7
  Sanjay Patel authored May 13, 2019
  cb8957f7
- [X86][SSE] LowerBuildVectorv4x32 - don't insert MOVQ for undef elts · 73aee290
  Simon Pilgrim authored May 13, 2019
  73aee290
- [X86][SSE] Relax use limits for lowerAddSubToHorizontalOp (PR32433) · cf5a8eb7
  Simon Pilgrim authored May 13, 2019
  cf5a8eb7
- [TargetLowering] Add SimplifyDemandedBits support for ZERO_EXTEND_VECTOR_INREG · d3cedee3
  Simon Pilgrim authored May 13, 2019
  d3cedee3
- [X86] Add test case for mask register variant of PR41619 which should be fixed after r360552 · c6a6c107
  Craig Topper authored May 13, 2019
  c6a6c107
- [DAGCombiner] narrow vector binop with inserts/extract · 05dafb1c
  Sanjay Patel authored May 13, 2019
  05dafb1c