Commits · ee8aa351e43f27e1dd4240560a3e054ca045186f · Roger Ferrer / llvm-epi · GitLab

May 16, 2022
- [AArch64] Use ADDV for boolean xor reductions. · ee8aa351
  Paul Walker authored May 14, 2022
  ee8aa351
- [InstrProf] Fix promoter when using counter relocations · 9a90ea1f
  Ellis Hoag authored May 16, 2022
  9a90ea1f
- [AIX] llvm-link support big archive. · c38ef550
  zhijian authored May 16, 2022
  c38ef550
- [DomPrinter] Migrate -dot-dom to the new pass manager. · 7dce9eb6
  Yang Keao authored May 16, 2022
  7dce9eb6
- [SelectionDAG] Remove duplicate "is scaled" information from gather/scatter SDNodes. · 7dd05ba9
  Paul Walker authored Apr 08, 2022
  7dd05ba9
- [AIX] fixed llvm-ar can not read empty big archive correctly. · 52c61555
  zhijian authored May 16, 2022
  52c61555
- [AMDGPU] Revert wide LDS DMA support. · 332b73fe
  Stanislav Mekhanoshin authored May 11, 2022
  332b73fe
- [WebAssembly][TableGen][NFCI] Use getValueAsBit rather than converting TableGen 'bit' to string · 92030635
  Alex Bradbury authored May 16, 2022
  92030635
- [llvm-objdump] Let --symbolize-operands symbolize basic block addresses based... · 5f7ef652
  Rahman Lavaee authored May 13, 2022
  5f7ef652
- Remove stale file from modulemap · 9c7c8be4
  Adrian Prantl authored May 16, 2022
  
  9c7c8be4
- [AArch64] Predicate SSHLL;SCVTF patterns behind UseAlternateSExtLoadCVTF32 · 5d29d752
  David Green authored May 16, 2022
  5d29d752
- [InstCombine] invert canonicalization for cast of signbit test · 3794cc0e
  Sanjay Patel authored May 16, 2022
  3794cc0e
- [InstCombine] add tests for zext-of-signbit test; NFC · 836305b2
  Sanjay Patel authored May 16, 2022
  
  836305b2
- [AArch64][ARM][RISCV][X86] Add test cases for PR55484. NFC · 74f6ded4
  Craig Topper authored May 16, 2022
  74f6ded4
- [TargetLowering] Expand the last stage of i16 popcnt using shift+add+and instead of mul+shift. · 1c4880a2
  Craig Topper authored May 16, 2022
  1c4880a2
- [DAGCombiner] Fix incorrect indentation. NFC · e6fc8454
  Craig Topper authored May 15, 2022
  
  e6fc8454
- [RISCV] Add further trace output to InsertVSETLVI · e2df48bb
  Philip Reames authored May 16, 2022
  
  e2df48bb
- [llvm-profgen] Update callsite body samples by summing up all call target samples. · acfd0a34
  Hongtao Yu authored May 12, 2022
  acfd0a34
- [InstrProf][NFC] Save profile bias to function map · 6e23cd2b
  Ellis Hoag authored May 16, 2022
  6e23cd2b
- [IR] create and use helper functions that test the signbit; NFCI · be7f09f7
  Sanjay Patel authored May 16, 2022
  
  be7f09f7
- [LiveIntervals] Add range accessors for value numbers [nfc] · 55e2df72
  Philip Reames authored May 16, 2022
  
  55e2df72
- [AArch64] Update check lines in arm64-scvt.ll. NFC · 7272a8c2
  David Green authored May 16, 2022
  
  7272a8c2
- [PhaseOrdering] add tests for cmp + boolean/bitwise logic; NFC · 325896d8
  Sanjay Patel authored May 16, 2022
  325896d8
- [InstCombine] fix test name; NFC · 242910ac
  Sanjay Patel authored May 16, 2022
  242910ac
- [SLP]Check if the root of the buildvector has one use only. · 15207280
  Alexey Bataev authored May 16, 2022
  15207280
- [ValueTracking] Handle and/or on RHS of isImpliedCondition() · 356d47cc
  Nikita Popov authored May 13, 2022
  356d47cc
- [LAA,LV] Add initial support for pointer-diff memory checks. · b7315ffc
  Florian Hahn authored May 16, 2022
  b7315ffc
- [AMDGPU] Mark sendmsg hasSideEffects. NFC · 6ef17f20
  Joe Nash authored May 13, 2022
  6ef17f20
- [AMDGPU] Shrink MAD/FMA to MADAK/MADMK/FMAAK/FMAMK on GFX10 · 27fa4158
  Jay Foad authored Feb 18, 2022
  27fa4158
- [ConstantRange] Add toKnownBits() method · 8ab819ad
  Nikita Popov authored May 16, 2022
  8ab819ad
- [AMDGPU] gfx11 BUF Instructions · c7025940
  Joe Nash authored Apr 19, 2022
  c7025940
- [CodeGen] Use ArrayRef in TargetLowering functions · ff3f4988
  Liqin.Weng authored May 16, 2022
  ff3f4988
- [RISCV] remove useless code · d95513ae
  Liqin.Weng authored May 16, 2022
  d95513ae
- [InstCombine] Combine instructions of type or/and where AND masks can be combined. · ec4adf1f
  Biplob Mishra authored May 16, 2022
  ec4adf1f
- [DAGCombine] Support splat_vector nodes in (and (extload)) dagcombine · 7ff5148d
  Bradley Smith authored May 10, 2022
  7ff5148d
- AArch64: support ISel for fence instructions · 1ddc6ab1
  Tim Northover authored May 16, 2022
  1ddc6ab1
- [ADT] Adopt the new casting infrastructure for PointerUnion · aab5bd18
  Sheng authored May 16, 2022
  aab5bd18
- [GlobalISel] Handle constant splat in funnel shift combine · 485dd0b7
  Abinav Puthan Purayil authored May 12, 2022
  485dd0b7
- [AMDGPU][GlobalISel] Pre-commit tests for D125516 · f96d2045
  Abinav Puthan Purayil authored May 13, 2022
  f96d2045
- [X86][AVX] Add test showing poor expansion of bit-reversal permutation shuffles · fab5c853
  Simon Pilgrim authored May 16, 2022
  fab5c853