Commits · ef9e624694c0f125c53f7d0d3472fd486bada57d · Roger Ferrer / llvm-epi · GitLab

Nov 14, 2022
- [opt][clang] Enable using -module-summary/-flto=thin with -S/-emit-llvm · ef9e6246
  Alexander Shaposhnikov authored Nov 14, 2022
  ef9e6246
- Revert "[dsymutil] Fix assertion in the Reproducer/FileCollector when TMPDIR is empty" · fd824bdc
  Jonas Devlieghere authored Nov 14, 2022
  fd824bdc
- [DirectX backend] Fix build and test error caused by out of sync with upstream change. · ad68c66a
  Xiang Li authored Nov 11, 2022
  ad68c66a
- [dsymutil] Fix assertion in the Reproducer/FileCollector when TMPDIR is empty · 68efb477
  Jonas Devlieghere authored Nov 11, 2022
  68efb477
- [MachineCSE] Allow CSE for instructions with ignorable operands · 11e86868
  Guozhi Wei authored Nov 14, 2022
  11e86868
- [AMDGPU][MC][NFC] Rename VOP3 VOPC test files · 38f47d90
  Joe Nash authored Nov 14, 2022
  38f47d90
- [GlobalIsel][AMDGPU] Changing legalize rule for G_{UADDO|UADDE|USUBO|USUBE|SADDE|SSUBE} · 1c9a93ae
  Yashwant Singh authored Nov 14, 2022
  1c9a93ae
- [RISCV] Remove old test case. NFC · 637ed52d
  Craig Topper authored Nov 14, 2022
  637ed52d
- [RISCV] Improve use of PACK instruction on rv64. · 13e32a8a
  Craig Topper authored Nov 14, 2022
  13e32a8a
- [InstSimplify] restrict logic fold with partial undef vector · 0a37290d
  Sanjay Patel authored Nov 14, 2022
  0a37290d
- [SystemZ] improve test for showing store merge miscompile; NFC · cd7ff070
  Sanjay Patel authored Nov 13, 2022
  cd7ff070
- [RISCV] Implement assembler support for XVentanaCondOps · 780c5398
  Philip Reames authored Nov 14, 2022
  780c5398
- [MCA][X86] Ensure the avx512 vnni tests use the upper xmm/ymm registers · 7e786857
  Simon Pilgrim authored Nov 14, 2022
  7e786857
- [MCA][X86] Add test coverage for VBMI2 instructions · d7208b04
  Simon Pilgrim authored Nov 14, 2022
  
  d7208b04
- [AMDGPU][AsmParser] Forbid TFE modifiers for MBUF stores. · d55594bb
  Ivan Kosarev authored Nov 14, 2022
  d55594bb
- [NFC] Removal of complex deinterleaving test case complex_mul_v8f64 · 62b00bf1
  Nicholas Guy authored Nov 14, 2022
  62b00bf1
- [AMDGPU][MC] Support TFE modifiers in MUBUF loads and stores. · 1b560e6a
  Ivan Kosarev authored Nov 14, 2022
  1b560e6a
- [AArch64] Add all SME2.1 instructions Assembly/Disassembly · 3eacda45
  Caroline Concatto authored Nov 03, 2022
  3eacda45
- [AST] Remove legacy AliasSetPrinter pass · 458ae539
  Nikita Popov authored Nov 14, 2022
  458ae539
- [AArch64] Add match patterns for the reassociated forms of FNMUL · cc5f93bb
  Sjoerd Meijer authored Nov 11, 2022
  cc5f93bb
- [ARM][CodeGen] Add support for complex deinterleaving · d52e2839
  Nicholas Guy authored Nov 14, 2022
  d52e2839
- [AMDGPU][MC][GFX11] Improve diagnostic messages for invalid VOPD syntax · ef6f3c76
  Dmitry Preobrazhensky authored Nov 14, 2022
  ef6f3c76
- [InstCombine][NFC] Add extractelement tests · 034df6f7
  Thomas Symalla authored Nov 14, 2022
  
  034df6f7
- [reg2mem] Skip non-sized Instructions (PR58890) · 200f3410
  HanSheng Zhang authored Nov 14, 2022
  200f3410
- Do not write a comma when varargs is the only argument · 8ad88f12
  Joshua Cao authored Nov 13, 2022
  8ad88f12
- [Coroutines] Do not add allocas for retcon coroutines · ce879a03
  Sebastian Neubauer authored Nov 14, 2022
  ce879a03
- [Coroutines] Presubmit retcon without suspend test · 0387679e
  Sebastian Neubauer authored Nov 11, 2022
  0387679e
- [ConstraintElimination] Make decompose() infallible · 30982a59
  Nikita Popov authored Nov 11, 2022
  30982a59
- [IRCE] Bail out if AddRec in icmp is for another loop (PR58912) · 10ab29ec
  Dmitry Makogon authored Nov 11, 2022
  10ab29ec
- [RISCV] Add PACKH/PACKW/PACK to hasAllNBitUsers. · 3b759798
  Craig Topper authored Nov 13, 2022
  
  3b759798
- [RISCV] Add another PACKH pattern. · 3ac93d1f
  Craig Topper authored Nov 13, 2022
  3ac93d1f
- [RISCV] Improve PACKH instruction selection · 40ae4b89
  Craig Topper authored Nov 13, 2022
  40ae4b89
- [RISCV] Don't use zero-stride vector load if there's no optimized u-arch · c66b6977
  Pengcheng Wang authored Nov 14, 2022
  c66b6977
- [RISCV] Improve selection of PACKW. · 1a8ba9e1
  Craig Topper authored Nov 13, 2022
  1a8ba9e1
- [LoopFlatten] Forget all block and loop dispositions after flatten · 98eb9179
  luxufan authored Nov 11, 2022
  98eb9179
- [LoongArch] Expand atomicrmw fadd/fsub/fmin/fmax with CmpXChg · 19ae5391
  gonglingqin authored Nov 14, 2022
  19ae5391
- [RISCV] Fix incorrect early out from isSignExtendedW in RISCVSExtWRemoval. · 03f9009c
  Craig Topper authored Nov 13, 2022
  03f9009c
- [RISCV] Add test for incorrect sext.w removal. NFC · fe0d4ba3
  Craig Topper authored Nov 13, 2022
  
  fe0d4ba3
- [RISCV] Improve selection of PACK/PACKW for AssertZExt input. · 95388f73
  Craig Topper authored Nov 13, 2022
  
  95388f73
Nov 13, 2022
- [VectorUtils] Skip interleave members with diff type and alloca sizes. · 758699c3
  Florian Hahn authored Nov 13, 2022
  758699c3