Commits · f13beac51be02cae21bce465206a920ecdca7566 · Roger Ferrer / llvm-epi · GitLab

Sep 02, 2020
- [AArch64][SVE] Preserve full vector regs over EH edge. · f13beac5
  Sander de Smalen authored Sep 02, 2020
  f13beac5
- [DebugInfo] Emit a 1-byte value as a terminator of entries list in the name index. · 3445ec9b
  Igor Kudrin authored Sep 02, 2020
  3445ec9b
- [DebugInfo] Remove Dwarf5AccelTableWriter::Header::UnitLength. NFC. · 71eed480
  Igor Kudrin authored Sep 02, 2020
  71eed480
- [X86] Remove superfluous trailing semicolons, fixing warnings. NFC. · 4820af2b
  Martin Storsjö authored Sep 02, 2020
  
  4820af2b
- [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - add general shuffle combining support · 21d02dc5
  Simon Pilgrim authored Sep 02, 2020
  21d02dc5
- [Attributor] Make use of AANoUndef in AAUndefinedBehavior · 5d134795
  Shinji Okumura authored Sep 02, 2020
  5d134795
- [Attributor] Fix AANoUndef initialization · 7558e9e5
  Shinji Okumura authored Sep 02, 2020
  7558e9e5
- [RFC][Target] Add a new triple called Triple::csky · b21ddded
  Zi Xuan Wu authored Sep 02, 2020
  b21ddded
- [ORC] Remove stray debugging output. · bd09e0dd
  Lang Hames authored Sep 01, 2020
  
  bd09e0dd
- [ORC] Add an early out for MachOPlatform's init-scraper plugin setup. · c40ce0da
  Lang Hames authored Sep 01, 2020
  c40ce0da
- [ORC] Fix MachOPlatform's synthetic symbol dependence registration. · 7ff335a2
  Lang Hames authored Sep 01, 2020
  7ff335a2
- [DebugInfo] Simplify string table dumpers. · 369f9169
  Xing GUO authored Sep 02, 2020
  369f9169
- [MemCpyOptimizer] Preserve analyses and replace use of lambdas to get them. · 1ccfb52a
  Alina Sbirlea authored Feb 07, 2020
  1ccfb52a
- [NFC] Fix unused var in release builds. · 20276694
  Jordan Rupprecht authored Sep 01, 2020
  20276694
- [PowerPC] Implement builtins for xvcvspbf16 and xvcvbf16spn · 0c2d872d
  Amy Kwan authored Sep 01, 2020
  0c2d872d
Sep 01, 2020
- [SVE] Update INSERT_SUBVECTOR DAGCombine to use getVectorElementCount(). · cfe2b817
  Cameron McInally authored Sep 01, 2020
  cfe2b817
- Revert "Revert "[GlobalISel] Fold xor(cmp(pred, _, _), 1) ->... · 520ab710
  Amara Emerson authored Sep 01, 2020
  520ab710
- Revert "[GlobalISel] Fold xor(cmp(pred, _, _), 1) -> cmp(inverse(pred), _, _)"... · 8693ddc7
  Jordan Rupprecht authored Sep 01, 2020
  8693ddc7
- [amdgpu] Run SROA after loop unrolling. · 1f4e7463
  Michael Liao authored Jul 20, 2020
  1f4e7463
- [NFC] Fix unused var in release build · c90f15d2
  Jordan Rupprecht authored Sep 01, 2020
  
  c90f15d2
- [Loads] Add canReplacePointersIfEqual helper. · 0d966ae4
  Florian Hahn authored Sep 01, 2020
  0d966ae4
- [LV] Interleave to expose ILP for small loops with scalar reductions. · d7e16ca2
  Aaron Liu authored Sep 01, 2020
  d7e16ca2
- [MachineCopyPropagation] In isNopCopy, check the destination registers match... · 4783e2c9
  Craig Topper authored Sep 01, 2020
  4783e2c9
- [Bindings] Add LLVMAddInstructionSimplifyPass · 96f0b575
  Arthur Eubanks authored Aug 28, 2020
  96f0b575
- Revert "Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain"" · 5987da87
  Owen Anderson authored Sep 01, 2020
  5987da87
- [MemorySSA] Update phi map with replacement value. · c292fba4
  Alina Sbirlea authored Sep 01, 2020
  
  c292fba4
- [PowerPC][AIX] Update save/restore offset for frame and base pointers. · fecc27db
  Sean Fertile authored Sep 01, 2020
  fecc27db
- [Bitstream] Use alignTo to make code more readable. NFC · 96ae43ba
  Craig Topper authored Sep 01, 2020
  96ae43ba
- [AArch64][GlobalISel] Optimize away a Not feeding a brcond by using tbz instead of tbnz. · 5ded4442
  Amara Emerson authored Aug 22, 2020
  5ded4442
- [GlobalISel] Fold xor(cmp(pred, _, _), 1) -> cmp(inverse(pred), _, _) · 8ad8f484
  Amara Emerson authored Aug 21, 2020
  8ad8f484
- x87 FPU state instructions do not use an f32 memory location · a57fdcdd
  Eric Astor authored Sep 01, 2020
  a57fdcdd
- GlobalISel: Implement computeNumSignBits for G_SELECT · 32a8a10b
  Matt Arsenault authored Aug 27, 2020
  
  32a8a10b
- GlobalISel: Port smarter known bits for umin/umax from DAG · 35c94d3f
  Matt Arsenault authored Aug 27, 2020
  
  35c94d3f
- GlobalISel: Implement computeKnownBits for G_BSWAP and G_BITREVERSE · 759482dd
  Matt Arsenault authored Aug 27, 2020
  
  759482dd
- [PowerPC] Handle STRICT_FSETCC(S) in more cases · 29ae4485
  Qiu Chaofan authored Sep 02, 2020
  29ae4485
- [DAGCombiner] Fold an AND of a masked load into a zext_masked_load · 15e880a0
  Sam Tebbs authored Sep 01, 2020
  15e880a0
- [PowerPC] Implement instruction definitions/MC Tests for xvcvspbf16 and xvcvbf16spn · ca2227c1
  Amy Kwan authored Sep 01, 2020
  ca2227c1
- GlobalISel: Add combines for extend operations · 061182b7
  Volkan Keles authored Sep 01, 2020
  061182b7
- GlobalISel: Implement computeNumSignBits for G_SEXTLOAD/G_ZEXTLOAD · 9e7e1b2d
  Matt Arsenault authored Aug 28, 2020
  
  9e7e1b2d
- GlobalISel: Implement computeKnownBits for G_UNMERGE_VALUES · 92090e8b
  Matt Arsenault authored Aug 27, 2020
  
  92090e8b