Commits · f208f6311b6ea3468b35deab208e307f8a59781b · Roger Ferrer / llvm-epi · GitLab

Aug 30, 2018
- [NFC] Rename the DivergenceAnalysis to LegacyDivergenceAnalysis · 35617ed4
  Nicolai Haehnle authored Aug 30, 2018
  35617ed4
Aug 26, 2018
- [SelectionDAG][x86] turn insertelement into undef with variable index into splat · 113cac3b
  Sanjay Patel authored Aug 26, 2018
  113cac3b
Aug 20, 2018
- [FPEnv] Support constrained FREM intrinsic · 94b9029b
  Cameron McInally authored Aug 20, 2018
  94b9029b
Aug 15, 2018
- [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. · 0d12e90b
  Eli Friedman authored Aug 14, 2018
  0d12e90b
Aug 07, 2018
- [TargetLowering] Add support for non-uniform vectors to BuildUDIV · 7e189387
  Simon Pilgrim authored Aug 07, 2018
  7e189387
Aug 03, 2018
- DAG: Enhance isKnownNeverNaN · c3dc8e65
  Matt Arsenault authored Aug 03, 2018
  c3dc8e65
- [TargetLowering] Generalise BuildSDIV function · 94112ebc
  Simon Pilgrim authored Aug 03, 2018
  94112ebc
Jul 31, 2018
- [DAGCombiner][TargetLowering] Pass a SmallVector instead of a std::vector to... · 2f60ef2c
  Craig Topper authored Jul 30, 2018
  2f60ef2c
Jul 30, 2018
- [DAGCombiner][PowerPC][AArch64] Pass Created vector by reference to BuildSDIVPow2. · a568a27d
  Craig Topper authored Jul 30, 2018
  a568a27d
Jul 28, 2018
- [SelectionDAG] Pass std::vector by reference instead of by pointer to BuildSDIV/BuildUDIV. · 9db3573d
  Craig Topper authored Jul 28, 2018
  9db3573d
- DAG: Add calling convention argument to calling convention funcs · 81920b0a
  Matt Arsenault authored Jul 28, 2018
  81920b0a
Jul 16, 2018
- [CodeGen] Fix inconsistent declaration parameter name · cb0bab86
  Fangrui Song authored Jul 16, 2018
  cb0bab86
- [X86][AArch64][DAGCombine] Unfold 'check for [no] signed truncation' pattern · de506632
  Roman Lebedev authored Jul 16, 2018
  de506632
Jul 09, 2018
- [X86][TLI] DAGCombine: Unfold variable bit-clearing mask to two shifts. · 5ccae175
  Roman Lebedev authored Jul 09, 2018
  5ccae175
Jun 26, 2018
- [TargetLowering] isVectorClearMaskLegal - use ArrayRef<int> instead of const SmallVectorImpl<int>& · aa2bf2be
  Simon Pilgrim authored Jun 26, 2018
  aa2bf2be
Jun 15, 2018
- [FPEnv] Expand constrained FP POWI · 7caac670
  Cameron McInally authored Jun 15, 2018
  7caac670
May 29, 2018
- DAG: Remove redundant version of getRegisterTypeForCallingConv · ab2b79cb
  Matt Arsenault authored May 29, 2018
  ab2b79cb
- [StrictFP] Make getStrictFPOpcodeAction(...) more accessible · b1bb60ae
  Cameron McInally authored May 29, 2018
  b1bb60ae
May 16, 2018
- [AArch64] Gangup loads and stores for pairing. · cabe50a3
  Sirish Pande authored May 16, 2018
  cabe50a3
May 10, 2018
- [CGP] Split large data structres to sink more GEPs · 0aae2bc2
  Haicheng Wu authored May 10, 2018
  0aae2bc2
May 01, 2018
- Remove \brief commands from doxygen comments. · 5f8f34e4
  Adrian Prantl authored May 01, 2018
  5f8f34e4
Apr 26, 2018
- [Docs] Escape the @ symbol, so that it appears in documentation output. [NFC] · 3e790840
  Matt Davis authored Apr 26, 2018
  3e790840
Apr 17, 2018
- [XRay] Typed event logging intrinsic · 3d86823f
  Keith Wyss authored Apr 17, 2018
  3d86823f
Mar 29, 2018
- [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to CodeGen layer. · 2fa14362
  Craig Topper authored Mar 29, 2018
  2fa14362
Mar 24, 2018
- Fix layering by moving ValueTypes.h from CodeGen to IR · 36a0f226
  David Blaikie authored Mar 23, 2018
  36a0f226
- Fix layering of MachineValueType.h by moving it from CodeGen to Support · 13e77db2
  David Blaikie authored Mar 23, 2018
  13e77db2
Mar 17, 2018
- [X86] Added support for nocf_check attribute for indirect Branch Tracking · fdd72fd5
  Oren Ben Simhon authored Mar 17, 2018
  fdd72fd5
Mar 09, 2018
- [x86][aarch64] ask the backend whether it has a vector blend instruction · b4bd0a40
  Sebastian Pop authored Mar 09, 2018
  b4bd0a40
Mar 06, 2018
- [TargetLowering] Rename DAGCombinerInfo::isAfterLegalizeVectorOps to... · 80d3bb3b
  Craig Topper authored Mar 06, 2018
  80d3bb3b
Mar 05, 2018
- Pass Divergence Analysis data to Selection DAG to drive divergence · 2e5eecee
  Alexander Timofeev authored Mar 05, 2018
  2e5eecee
Feb 22, 2018
- [TargetLowering] Rename isCondCodeLegal to isCondCodeLegalOrCustom. Add real... · a2cc3c05
  Craig Topper authored Feb 22, 2018
  a2cc3c05
Feb 20, 2018
- [SelectionDAG] Add LegalTypes flag to getShiftAmountTy. Use it to unify and... · 35801fa5
  Craig Topper authored Feb 20, 2018
  35801fa5
Feb 15, 2018
- [SelectionDAG] Add initial implementation of TargetLowering::SimplifyDemandedVectorElts · 80663ee9
  Simon Pilgrim authored Feb 15, 2018
  80663ee9
Feb 14, 2018
- Adding a width of the GEP index to the Data Layout. · 945b7e5a
  Elena Demikhovsky authored Feb 14, 2018
  945b7e5a
Feb 11, 2018
- [SelectionDAG] Remove TargetLowering::getConstTrueVal. Use... · 36f913ee
  Craig Topper authored Feb 11, 2018
  36f913ee
Feb 01, 2018
- [XRay][compiler-rt+llvm] Update XRay register stashing semantics · cdca0730
  Dean Michael Berris authored Feb 01, 2018
  cdca0730
Jan 23, 2018
- [NFC] fix trivial typos in comments · 4cf7b885
  Hiroshi Inoue authored Jan 23, 2018
  4cf7b885
Jan 22, 2018
- Introduce the "retpoline" x86 mitigation technique for variant #2 of the... · c58f2166
  Chandler Carruth authored Jan 22, 2018
  c58f2166
Jan 03, 2018
- [ExpandMemcmp] rename variables and add hook to override pref for number of loads per block; NFC · f344987c
  Sanjay Patel authored Jan 03, 2018
  f344987c
Dec 20, 2017
- [JumpTables] Let targets decide which switch instructions are suitable · b55b0ac1
  Nemanja Ivanovic authored Dec 20, 2017
  b55b0ac1