Commits · f2674319018151e00f603ebab34ab2155f669394 · Roger Ferrer / llvm-epi · GitLab

Jun 21, 2018
- AMDGPU: Turn D16 for MIMG instructions into a regular operand · f2674319
  Nicolai Haehnle authored Jun 21, 2018
  f2674319
- [DebugInfo] Make sure all DBG_VALUEs' reguse operands have IsDebug property · 42f7bc96
  Mikael Holmen authored Jun 21, 2018
  42f7bc96
- [DAGCombine] Fix alignment for offset loads/stores · a4651885
  David Green authored Jun 21, 2018
  a4651885
- [X86] Go through some tests that still reference old intrinsics that have been... · 76df3d61
  Craig Topper authored Jun 21, 2018
  76df3d61
- [RISC-V] Fix a test case to not include label names as those aren't · e5f1b8e2
  Chandler Carruth authored Jun 21, 2018
  e5f1b8e2
- [X86] Remove masking from 512-bit floating max/min intrinsics. Use select instruction instead. · 296526bf
  Craig Topper authored Jun 21, 2018
  296526bf
- [mips] Add microMIPS specific addressing patterns. · 0f111dd7
  Simon Dardis authored Jun 20, 2018
  0f111dd7
- Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred. · dfd14ade
  Alina Sbirlea authored Jun 20, 2018
  dfd14ade
Jun 20, 2018
- [X86] Use setcc ISD opcode for AVX512 integer comparisons all the way to isel · c2696d57
  Craig Topper authored Jun 20, 2018
  c2696d57
- Allow binop C1, (select cc, CF, CT) -> select folding · 20279dc0
  Stanislav Mekhanoshin authored Jun 20, 2018
  20279dc0
- [mips] Correct predicates for loads, bit manipulation instructions and some pseudos · 6021424c
  Simon Dardis authored Jun 20, 2018
  6021424c
- AMDGPU: Fix scalar_to_vector for v4i16/v4f16 · 5a4ec812
  Matt Arsenault authored Jun 20, 2018
  5a4ec812
- [Hexagon] Replace .ll test for expanding post-ra pesudos with .mir · 95486fd5
  Krzysztof Parzyszek authored Jun 20, 2018
  95486fd5
- [DAG] Don't map a TableId to itself in the ReplacedValues map · 7bf67666
  Bjorn Pettersson authored Jun 20, 2018
  7bf67666
- [DAG] Fix and-mask folding when narrowing loads. · cd558887
  Nirav Dave authored Jun 20, 2018
  cd558887
- [X86] Adding a test for PR37879 · 027fd806
  Mikhail Dvoretckii authored Jun 20, 2018
  027fd806
- ARM: convert ORR instructions to ADD where possible on Thumb. · 644a8195
  Tim Northover authored Jun 20, 2018
  644a8195
- [AArch64] Implement FLT_ROUNDS macro. · 70666e77
  Tim Northover authored Jun 20, 2018
  70666e77
- [X86] Add sched class WriteLAHFSAHF and fix values. · 7b9913fb
  Clement Courbet authored Jun 20, 2018
  7b9913fb
- [X86] Remove a fptosi from the test_mm512_mask_reduce_max_pd fast-isel test. · 31a64ee7
  Craig Topper authored Jun 20, 2018
  31a64ee7
- [SelectionDAG] Don't crash on inline assembly errors when the inline assembly... · 59da7437
  Craig Topper authored Jun 20, 2018
  59da7437
- Add more test cases for deopt-operands via regalloc · 62bbd54e
  Philip Reames authored Jun 20, 2018
  62bbd54e
Jun 19, 2018
- [InlineSpiller] Fix a crash due to lack of forward progress from remat specifically for STATEPOINT · 8befa295
  Philip Reames authored Jun 19, 2018
  8befa295
- [WebAssembly] Fix liveness tracking info after drop insertion · 891a7472
  Heejin Ahn authored Jun 19, 2018
  891a7472
- [X86] Update fast-isel tests for clang's avx512f reduction intrinsics to match... · 31961f05
  Craig Topper authored Jun 19, 2018
  31961f05
- [X86] Add fast-isel tests for clang's AVX512F vector reduction intrinsics. · 858afbd1
  Craig Topper authored Jun 19, 2018
  858afbd1
- [MIRParser] Update a diagnostic message to use the correct register sigil. NFC · a245c765
  Matt Davis authored Jun 19, 2018
  a245c765
- [X86] Don't fold unaligned loads into SSE ROUNDPS/ROUNDPD for ceil/floor/nearbyint/rint/trunc. · 7ffa9769
  Craig Topper authored Jun 19, 2018
  7ffa9769
- [Hexagon] Enforce restrictions on packetizing cache instructions · 5c2944c4
  Krzysztof Parzyszek authored Jun 19, 2018
  5c2944c4
- [mips] Mark microMIPS64 as being unsupported. · af38a8fe
  Simon Dardis authored Jun 19, 2018
  af38a8fe
- [PowerPC] Fix label address calculation for ppc32 · bb2b00bb
  Strahinja Petrovic authored Jun 19, 2018
  bb2b00bb
- [X86] VRNDSCALE* folding from masked and scalar ffloor and fceil patterns · b1ce7765
  Mikhail Dvoretckii authored Jun 19, 2018
  b1ce7765
- If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction... · 9f0fe9a3
  QingShan Zhang authored Jun 19, 2018
  9f0fe9a3
- [RISCV] Add tests for overflow intrinsics · ec03fbe8
  Roger Ferrer Ibanez authored Jun 19, 2018
  ec03fbe8
- [ARM] Thumb2 constant cmp testcases. · de735c97
  Eli Friedman authored Jun 19, 2018
  de735c97
- [ARM] Testcase for Thumb1 cmp with constants. · 9e3bb196
  Eli Friedman authored Jun 19, 2018
  9e3bb196
- [ARM] Add Thumb1 coverage for cmn testcases. · e6b47192
  Eli Friedman authored Jun 19, 2018
  e6b47192
- [ARM] Testcase for missed optimization for masking. · 892366d0
  Eli Friedman authored Jun 19, 2018
  892366d0
- [ARM] Testcase for missed optimization with i16 compare. · 801c2f4c
  Eli Friedman authored Jun 19, 2018
  801c2f4c
- Utilize new SDNode flag functionality to expand current support for fadd · 7b993d76
  Michael Berg authored Jun 18, 2018
  7b993d76