Commits · f63a19baf0a3ffa62cfb48cc42f9ced1cbd39b5c · Roger Ferrer / llvm-epi · GitLab

Nov 27, 2022
- [SPARC] Add tail call support for 64-bit target · f63a19ba
  Koakuma authored Nov 26, 2022
  f63a19ba
Nov 26, 2022
- [llvm] Use std::size (NFC) · 589725f6
  Kazu Hirata authored Nov 26, 2022
  589725f6
- [AArch64] `LowerBUILD_VECTOR()`: `NormalizeBuildVector()` might return non-BUILD_VECTOR · 453f27bc
  Roman Lebedev authored Nov 26, 2022
  453f27bc
- [X86] Use std::optional in X86SpeculativeLoadHardening.cpp (NFC) · 3583f4ff
  Kazu Hirata authored Nov 25, 2022
  3583f4ff
- [RISCV] Use std::optional in RISCVMergeBaseOffset.cpp (NFC) · 14931309
  Kazu Hirata authored Nov 25, 2022
  14931309
- [RISCV] Use std::optional in RISCVISelLowering.cpp (NFC) · 2f61c6c6
  Kazu Hirata authored Nov 25, 2022
  2f61c6c6
- [RISCV] Use std::optional in RISCVISelDAGToDAG.cpp (NFC) · 362ca6cb
  Kazu Hirata authored Nov 25, 2022
  362ca6cb
- [RISCV] Use std::optional in RISCVGatherScatterLowering.cpp (NFC) · 7e008206
  Kazu Hirata authored Nov 25, 2022
  7e008206
- [PowerPC] Use std::optional in PPCMacroFusion.cpp (NFC) · c672bb67
  Kazu Hirata authored Nov 25, 2022
  c672bb67
- [NVPTX] Use std::optional in NVPTXTargetTransformInfo.cpp (NFC) · da4dd0aa
  Kazu Hirata authored Nov 25, 2022
  da4dd0aa
- [AsmParser] Use std::optional in LanaiAsmParser.cpp (NFC) · 704b4f35
  Kazu Hirata authored Nov 25, 2022
  704b4f35
- [Hexagon] Use std::optional in HexagonFrameLowering.cpp (NFC) · 9d7faffa
  Kazu Hirata authored Nov 25, 2022
  9d7faffa
- [ARM] Use std::optional in ARMISelDAGToDAG.cpp (NFC) · ac7af9a0
  Kazu Hirata authored Nov 25, 2022
  ac7af9a0
- [Utils] Use std::optional in AMDGPUBaseInfo.cpp (NFC) · aad2d272
  Kazu Hirata authored Nov 25, 2022
  aad2d272
- [AMDGPU] Use std::optional in SIPeepholeSDWA.cpp (NFC) · 09e0aeaa
  Kazu Hirata authored Nov 25, 2022
  09e0aeaa
- [AsmParser] Use std::optional in AMDGPUAsmParser.cpp (NFC) · 96cb34ab
  Kazu Hirata authored Nov 25, 2022
  96cb34ab
- [AMDGPU] Use std::optional in AMDGPUReleaseVGPRs.cpp (NFC) · ebe32817
  Kazu Hirata authored Nov 25, 2022
  ebe32817
- [AMDGPU] Use std::optional in AMDGPUInstructionSelector.cpp (NFC) · 959c9cc7
  Kazu Hirata authored Nov 25, 2022
  959c9cc7
- [GISel] Use std::optional in AArch64PostLegalizerLowering.cpp (NFC) · f0105ee9
  Kazu Hirata authored Nov 25, 2022
  f0105ee9
- [GISel] Use std::optional in AArch64InstructionSelector.cpp (NFC) · 5c99c2e1
  Kazu Hirata authored Nov 25, 2022
  5c99c2e1
- [AsmParser] Use std::optional in AArch64AsmParser.cpp (NFC) · fc07a54e
  Kazu Hirata authored Nov 25, 2022
  fc07a54e
- [AArch64] Use std::optional in AArch64LowerHomogeneousPrologEpilog.cpp (NFC) · 185f647b
  Kazu Hirata authored Nov 25, 2022
  185f647b
- [AArch64] Use std::optional in AArch64LoadStoreOptimizer.cpp (NFC) · 298cb551
  Kazu Hirata authored Nov 25, 2022
  298cb551
- [AArch64] Use std::optional in AArch64ISelLowering.cpp (NFC) · 23ca5523
  Kazu Hirata authored Nov 25, 2022
  23ca5523
- [AArch64] Use std::optional in AArch64FrameLowering.cpp (NFC) · 4f7e5930
  Kazu Hirata authored Nov 25, 2022
  4f7e5930
Nov 25, 2022
- [AArch64] Assembly support for FEAT_LRCPC3 · a6aaa969
  Tomas Matheson authored Mar 08, 2022
  a6aaa969
- [RISCV] Add ADD to getRegAllocationHints to improve to improve use of c.add. · 64612f5d
  Craig Topper authored Nov 25, 2022
  64612f5d
- [RISCV] Use register allocation hints to improve use of compressed instructions. · a2b5b584
  Craig Topper authored Nov 25, 2022
  a2b5b584
- [X86] lowerShuffleAsDecomposedShuffleMerge - try to match... · c757780c
  Simon Pilgrim authored Nov 25, 2022
  c757780c
- [AMDGPU][MC] Refactor MC Code Emitter to avoid using magic values · a0a0dc6f
  Dmitry Preobrazhensky authored Nov 25, 2022
  a0a0dc6f
- [X86] Move lowerShuffleAsPermuteAndUnpack earlier in the source next to similar helpers. NFC. · 38275ab1
  Simon Pilgrim authored Nov 25, 2022
  38275ab1
- [RISCV] Branchless lowering for (select (x < 0), TrueConstant, FalseConstant)... · aa14f002
  LiaoChunyu authored Nov 17, 2022
  aa14f002
- [BPF] Avoid checking for intrinsics using string comparisons. NFC · d77b7cac
  Alex Richardson authored Nov 25, 2022
  d77b7cac
- [X86] combineScalarAndWithMaskSetcc - handle (concat_vectors (and (vYi1 setcc,... · 6fd0ae39
  Simon Pilgrim authored Nov 25, 2022
  6fd0ae39
- [TargetLowering][AArch64] Teach DemandedBits about SVE count intrinsics · 79b5829a
  Benjamin Maxwell authored Nov 25, 2022
  79b5829a
- [Hexagon] Apply 7f06a582 to another copy of the same code · b89e0acb
  Benjamin Kramer authored Nov 25, 2022
  
  b89e0acb
- [Hexagon] Put asserts in an !NDEBUG region. NFCI · 7f06a582
  Benjamin Kramer authored Nov 25, 2022
  7f06a582
- [VE] Remove unnecessary isReMaterializable flags · a89c9baf
  Kazushi (Jam) Marukawa authored Nov 23, 2022
  a89c9baf
- [Hexagon] Don't lower legal EXTRACT_SUBVECTOR to EXTRACT_SUBREG · d9ed93da
  Krzysztof Parzyszek authored Nov 24, 2022
  d9ed93da
Nov 24, 2022
- [AArch64][SME]: Generate streaming-compatible code for int/fp select/vselect · 5cf75ecf
  Hassnaa Hamdi authored Nov 22, 2022
  5cf75ecf