Commits · f6985a197ef9065a64d0bb819bfd90d1862da45b · Roger Ferrer / llvm-epi · GitLab

May 10, 2021
- AMDGPU/GlobalISel: Use destination register bank in applyMappingLoad · f6985a19
  Petar Avramovic authored May 10, 2021
  f6985a19
- AMDGPU/GlobalISel: Add regbankselect test for vgpr(dest) sgpr(address) load · d13ce17b
  Petar Avramovic authored May 07, 2021
  d13ce17b
- [LegalizeVectorOps][RISCV] Add scalable-vector SELECT expansion · 6db0cedd
  Fraser Cormack authored May 07, 2021
  6db0cedd
- [AArch64][SVE] Remove index_vector node. · b3aeb138
  Jun Ma authored Apr 30, 2021
  b3aeb138
- [ORC] Use the new dispatchTask API to run query callbacks. · 7f9a89f9
  Lang Hames authored May 09, 2021
  7f9a89f9
- [ORC] Generalize materialization dispatch to task dispatch. · 5344c88d
  Lang Hames authored May 08, 2021
  5344c88d
- [SimplifyCFG] Ignore ephemeral values when counting insts for threading · 220f6e52
  Teresa Johnson authored Apr 28, 2021
  220f6e52
- [RISCV][NFC] Don't need to create a new STI in RISCVAsmPrinter. · 446ed639
  Zakk Chen authored May 05, 2021
  446ed639
- [Demangle][Rust] Print special namespaces · 78e94915
  Tomasz Miąsko authored May 09, 2021
  78e94915
May 09, 2021
- [X86] AMD Zen 3: same-reg CMP is a zero-cycle dependency-breaking instruction · be23d5e8
  Roman Lebedev authored May 09, 2021
  be23d5e8
- [NFC][X86][MCA] AMD Zen 3: add tests for CMP dependency breaking · 9a31efa2
  Roman Lebedev authored May 09, 2021
  
  9a31efa2
- [X86] AMD Zen 3: same-reg SBB is a dependency-breaking instruction · 11b0568d
  Roman Lebedev authored May 09, 2021
  11b0568d
- [NFC][X86][MCA] AMD Zen 3: add tests for SBB dependency breaking · 8d0e2d2b
  Roman Lebedev authored May 09, 2021
  
  8d0e2d2b
- [X86] AMD Zen 3: same-register XOR/SUB are GPR dependency breaking zero-idioms · eed85527
  Roman Lebedev authored May 09, 2021
  eed85527
- [NFC][X86][MCA] AMD Zen3: add GPR zero-idiom dependency breaking tests · ab794852
  Roman Lebedev authored May 09, 2021
  
  ab794852
- [ARM] Fix postinc of vst1xN · 76786037
  David Green authored May 09, 2021
  76786037
- [SCEV] Handle and/or in applyLoopGuards() · d26ca78c
  Nikita Popov authored May 01, 2021
  d26ca78c
- [SCEV] Add additional loop guard and/or tests (NFC) · 2a08d740
  Nikita Popov authored May 09, 2021
  2a08d740
- [NFC][X86] Znver3: drop obsolete fixme · 675daef5
  Roman Lebedev authored May 09, 2021
  
  675daef5
- [X86] AMD Zen 3: XCHG is a zero-cycle instruction · a21df76d
  Roman Lebedev authored May 09, 2021
  a21df76d
- [SelectionDAG] Regenerate test checks (NFC) · ad5f3f52
  LemonBoy authored May 09, 2021
  
  ad5f3f52
- [SROA] Regenerate test checks (NFC) · 7549399d
  Nikita Popov authored May 09, 2021
  
  7549399d
- [NFC][LoopIdiom] Add some tests for 'lshr until zero' ('count active bits') "on steroids" idiom · 4aec8f4c
  Roman Lebedev authored May 09, 2021
  
  4aec8f4c
- [NFCI][X86] Mark Znver3 scheduling model as complete · f8589292
  Roman Lebedev authored May 08, 2021
  f8589292
- [NFCI][X86] Mark a few lately-added system instructions as such for Scheduling purposes · d5494931
  Roman Lebedev authored May 08, 2021
  
  d5494931
May 08, 2021
- [test] Fix tools/gold/X86/new-pm.ll after D101797 · 492173d4
  Fangrui Song authored May 08, 2021
  
  492173d4
- [Hexagon] Propagate metadata in Hexagon Vector Combine · 56102693
  Krzysztof Parzyszek authored May 07, 2021
  
  56102693
- [llvm-mca][View] Update the Register File statistics. · de1843e5
  Andrea Di Biagio authored May 08, 2021
  de1843e5
- [MCA][RegisterFile] Refactor the move elimination logic to address PR50258. · 9ceea666
  Andrea Di Biagio authored May 08, 2021
  9ceea666
- [VPlan] Add test for sink scalars and merging using VPlan. · 2bf34c0a
  Florian Hahn authored Apr 11, 2021
  2bf34c0a
- [GlobalISel] Ensure MachineIRBuilder::getDebugLoc() returns a const reference. NFCI. · ab5ee342
  Simon Pilgrim authored May 08, 2021
  ab5ee342
- [X86] combineHorizOpWithShuffle - generalize HOP(SHUFFLE(X),SHUFFLE(Y)) -> SHUFFLE(HOP(X,Y)) fold. · 4524d8b7
  Simon Pilgrim authored May 08, 2021
  4524d8b7
- Revert "[LICM] Hoist loads with invariant.group metadata" · 1acd9a1a
  Roman Lebedev authored May 08, 2021
  1acd9a1a
- [X86] Improve costmodel for scalar byte swaps · b1c38207
  Roman Lebedev authored May 08, 2021
  b1c38207
- [VectorCombine] Simplify to scalar store if only one element updated · 2db4979c
  Qiu Chaofan authored May 08, 2021
  2db4979c
- [X86] Support AMX fast register allocation · d4bdeca5
  Xiang1 Zhang authored May 08, 2021
  d4bdeca5
- Fix build after 34a8a437 · 72bd0116
  Arthur Eubanks authored May 07, 2021
  
  72bd0116
- Revert "[X86] Support AMX fast register allocation" · bebafe01
  Xiang1 Zhang authored May 08, 2021
  bebafe01
- [X86] Support AMX fast register allocation · 77e2e5e0
  Xiang1 Zhang authored May 07, 2021
  
  77e2e5e0
- Replace a remaining CRLF with LF. NFC. · 631da3b1
  Michael Liao authored May 08, 2021
  
  631da3b1