Commits · f6df4a6978bd12d40bf5e484d840128666dadede · Roger Ferrer / llvm-epi · GitLab

Jan 30, 2017
- [AVX-512] Remove duplicate CodeGenOnly patterns for scalar register broadcast.... · f6df4a69
  Craig Topper authored Jan 30, 2017
  f6df4a69
- Test RuntimeDyld doesn't crash with R_X86_64_NONE (r293388). · ea7abaf7
  Will Dietz authored Jan 30, 2017
  ea7abaf7
- [X86][Disassembler] Added SALC instruction · 30b3fafb
  Chris Ray authored Jan 29, 2017
  30b3fafb
Jan 29, 2017
- [AVX-512] Fix lowering for mask register concatenation with undef in the lower half. · db919caf
  Craig Topper authored Jan 29, 2017
  db919caf
- [X86][SSE] Lower scalar_to_vector(0) to zero vector · 76073f8d
  Simon Pilgrim authored Jan 29, 2017
  76073f8d
- [X86] Reproducer for pr31719. NFC · a2a502b5
  Zvi Rackover authored Jan 29, 2017
  a2a502b5
- [InstCombine] enable (X >>?,exact C1) << C2 --> X << (C2 - C1) for vectors with splats · 062adaab
  Sanjay Patel authored Jan 29, 2017
  062adaab
- [InstCombine] add tests for shl(shr X, C1), C2 transforms; NFC · c0057483
  Sanjay Patel authored Jan 29, 2017
  c0057483
- ARM: support `-mlong-calls` with AEABI TLS on ELF · 5282eed0
  Saleem Abdulrasool authored Jan 29, 2017
  5282eed0
- [X86 Codegen] Fixed a bug in unsigned saturation · 17fe27f1
  Elena Demikhovsky authored Jan 29, 2017
  17fe27f1
- Add -mtriple=aarch64-unknown to llvm/test/CodeGen/AArch64/GlobalISel/gisel-abort.ll. · faa03195
  NAKAMURA Takumi authored Jan 29, 2017
  faa03195
- [X86][GlobalISel] Add limited argument lowering support to the IRTranslator. · 9ea154d4
  Igor Breger authored Jan 29, 2017
  9ea154d4
- Add some Book-E instructions to the asm parser and printer. · 10b6147e
  Justin Hibbits authored Jan 29, 2017
  10b6147e
- [X86] Fix vector ANDN matching to work correctly when both inputs to the AND are XORs. · 6533e40e
  Craig Topper authored Jan 28, 2017
  6533e40e
- [X86] Add test case that shows failure to use a vector ANDN when both inputs to the AND are XORs. · ed0ea561
  Craig Topper authored Jan 28, 2017
  ed0ea561
Jan 28, 2017
- [SLP] Vectorize loads of consecutive memory accesses, accessed in non-consecutive (jumbled) way. · 3121334d
  Mohammad Shahid authored Jan 28, 2017
  3121334d
- [NVPTX] Add intrinsics to support named barriers. · 2b156edf
  Arpith Chacko Jacob authored Jan 28, 2017
  2b156edf
- stripDebugInfo() should remove DILocation's found in !llvm.loop metadata · b96a945b
  Daniel Sanders authored Jan 28, 2017
  b96a945b
- [InstCombine] Merge DebugLoc when speculatively hoisting store instruction · 505a25ae
  Taewook Oh authored Jan 28, 2017
  505a25ae
- [RegisterBankInfo] Emit proper type for remapped registers. · 8cf1163c
  Quentin Colombet authored Jan 28, 2017
  8cf1163c
- [RegisterCoalescing] Recommit the patch "Remove partial redundent copy". · 35109902
  Quentin Colombet authored Jan 28, 2017
  35109902
- [InstCombine] move icmp transforms that might be recognized as min/max and inf-loop (PR31751) · febcb9ce
  Sanjay Patel authored Jan 27, 2017
  febcb9ce
Jan 27, 2017
- GlobalISel: set correct regclass for LOAD_STACK_GUARD. · d8b85584
  Tim Northover authored Jan 27, 2017
  d8b85584
- GlobalISel: mark incoming landing-pad registers as live. · c9bc8a55
  Tim Northover authored Jan 27, 2017
  c9bc8a55
- [X86] Adding FFREEP instruction. · 535e7d15
  Chris Ray authored Jan 27, 2017
  535e7d15
- AMDGPU: Enable FeatureFlatForGlobal on Volcanic Islands · d8f7ea38
  Matt Arsenault authored Jan 27, 2017
  d8f7ea38
- [ARM/AArch64] Relocate and update InterleavedAccessPass tests (NFC) · 3650df13
  Matthew Simpson authored Jan 27, 2017
  3650df13
- [CodeGenPrep]No negative cost in the ExtLd promotion · b99a06b7
  Jun Bum Lim authored Jan 27, 2017
  b99a06b7
- [AMDGPU] Turn AMDGPUUnifyMetadata back into module pass · f6c1feb8
  Stanislav Mekhanoshin authored Jan 27, 2017
  f6c1feb8
- Fix BasicAA incorrect assumption on GEP · 1726fc69
  Mehdi Amini authored Jan 27, 2017
  1726fc69
- [mips] Recommit: "N64 static relocation model support" · ca74dd79
  Simon Dardis authored Jan 27, 2017
  ca74dd79
- [LICM] When we are recomputing the alias sets for a subloop, we cannot · fd2d7c72
  Chandler Carruth authored Jan 27, 2017
  fd2d7c72
- [DAGTypeLegalizer] Handle SIGN/ZERO_EXTEND in WidenVecRes_Convert(). · bb0ed3e7
  Jonas Paulsson authored Jan 27, 2017
  bb0ed3e7
- ARM: fix vectorized division on WoA · 26c00e37
  Saleem Abdulrasool authored Jan 27, 2017
  26c00e37
- NewGVN: Add basic dead and redundant store elimination · c479686a
  Daniel Berlin authored Jan 27, 2017
  c479686a
- Constant fold switch inst when looking for trivial conditions to unswitch on. · e5f8d643
  Xin Tong authored Jan 27, 2017
  e5f8d643
- [PM] Port LoopLoadElimination to the new pass manager and wire it into · baabda93
  Chandler Carruth authored Jan 27, 2017
  baabda93
- [NVPTX] Upgrade NVVM intrinsics in InstCombineCalls. · 698c31b8
  Justin Lebar authored Jan 27, 2017
  698c31b8
- [PM] Flesh out almost all of the late loop passes. · a95ff389
  Chandler Carruth authored Jan 27, 2017
  a95ff389
- GlobalISel: support debug intrinsics. · 09aac4ad
  Tim Northover authored Jan 26, 2017
  09aac4ad