Commits · fa2b836ea393dc4d24d2fced0ea78b7527f77de9 · Roger Ferrer / llvm-epi · GitLab

Aug 11, 2020
- [GlobalISel] Add G_ABS · fa2b836e
  Jay Foad authored Aug 11, 2020
  fa2b836e
- [X86][SSE] Add HADD/SUB support to combineHorizOpWithShuffle · 91d59cbf
  Simon Pilgrim authored Aug 11, 2020
  91d59cbf
- AMDGPU/GlobalISel: Fix test bugs and add a few more cases · 6cac6616
  Matt Arsenault authored Aug 08, 2020
  6cac6616
- GlobalISel: Implement bitcast action for G_INSERT_VECTOR_ELT · e2f1b48f
  Matt Arsenault authored Jun 15, 2020
  e2f1b48f
- TableGen/GlobalISel: Hack the operand order for atomic_store · 53f21e0f
  Matt Arsenault authored Aug 02, 2020
  53f21e0f
- [ARM][MVE] Added extra tail-predication runs for auto-correlation test case. NFC · a680c797
  Sjoerd Meijer authored Aug 11, 2020
  
  a680c797
- [X86][SSE] Add tests for 256-bit HOP(SHUFFLE(X,Y),SHUFFLE(X,Y)) --> SHUFFLE(HOP(X,Y)) patterns · d7d172b4
  Simon Pilgrim authored Aug 11, 2020
  d7d172b4
- [X86][SSE] Add tests for HOP(LOSUBVECTOR(SHUFFLE(X)),HISUBVECTOR(SHUFFLE(X))) patterns · c5683ffe
  Simon Pilgrim authored Aug 11, 2020
  c5683ffe
- [SVE][CodeGen] Legalisation of INSERT_VECTOR_ELT for scalable vectors · 455ed56d
  Kerry McLaughlin authored Aug 11, 2020
  455ed56d
- [VE] Update bit operations · 59703f17
  Kazushi (Jam) Marukawa authored Aug 10, 2020
  59703f17
- [SVE] Lower fixed length vector integer subtract operations. · d542feb8
  Paul Walker authored Aug 10, 2020
  d542feb8
- Add missing `-o -` to a recent test · ef0c0844
  David Zarzycki authored Aug 11, 2020
  ef0c0844
- Test requires a debug build to pass. · 95648211
  Eric Christopher authored Aug 10, 2020
  
  95648211
- [CodeGen] Expand float operand for STRICT_FSETCC/STRICT_FSETCCS · 61ede38d
  QingShan Zhang authored Aug 11, 2020
  61ede38d
- [X86][FPEnv] Teach X86 mask compare intrinsics to respect strict FP semantics. · 95125259
  Wang, Pengfei authored Aug 11, 2020
  95125259
Aug 10, 2020
- [XCOFF][AIX] Use TE storage mapping class when large code model is enabled · 20abff04
  jasonliu authored Aug 10, 2020
  20abff04
- [MachineOutliner][AArch64] WA for multiple stack fixup cases in MachineOutliner. · 7bc03f55
  Puyan Lotfi authored Aug 10, 2020
  7bc03f55
- Fix "CHECK-LABEL: @" typos in llvm/test/CodeGen/AArch64/sve-fixed-length-*.ll · ab6a517e
  Paul Walker authored Aug 10, 2020
  
  ab6a517e
- Unbundle KILL bundles in VirtRegRewriter · 08803f0e
  Stanislav Mekhanoshin authored Aug 07, 2020
  08803f0e
- AMDGPU: Fix assertion in performSHLPtrCombine for 64-bit pointers · 6fe6b29c
  Matt Arsenault authored Aug 10, 2020
  
  6fe6b29c
- AMDGPU: Fix visiting physreg dest users when folding immediate copies · 68fab44a
  Matt Arsenault authored Aug 08, 2020
  68fab44a
- [X86][SSE] shuffle(hop,hop) - canonicalize unary hop(x,x) shuffle masks · 9a368d2b
  Simon Pilgrim authored Aug 10, 2020
  9a368d2b
- [XCOFF] Adjust .rename emission sequence · 7866442b
  jasonliu authored Aug 10, 2020
  7866442b
- [AIX] Static init frontend recovery and backend support · 6ef801aa
  Xiangling Liao authored Jul 15, 2020
  6ef801aa
- [PowerPC] Add option to control PCRel GOT indirect linker optimization · 81883ca0
  Stefan Pintilie authored Aug 10, 2020
  81883ca0
- [ARM] Unrestrict Armv8-a IT when at minsize · 4f9f4b21
  Sam Parker authored Aug 10, 2020
  4f9f4b21
- [X86][SSE] Add single undef element HADD test cases from PR34724 · 891ddfc6
  Simon Pilgrim authored Aug 10, 2020
  
  891ddfc6
- [PowerPC] Add intrinsic to read or set FPSCR register · dbcfbffc
  Qiu Chaofan authored Aug 10, 2020
  dbcfbffc
- [ScalarizeMaskedMemIntrin] Scalarize constant mask expandload as shuffle(build_vector,pass_through) · c0c3b9a2
  Simon Pilgrim authored Aug 10, 2020
  c0c3b9a2
- AMDGPU/GlobalISel: Lower G_FREM · 0d58d9e8
  Petar Avramovic authored Aug 10, 2020
  0d58d9e8
- [BuildLibCalls] Add noundef to standard I/O functions · ef018cb6
  Juneyoung Lee authored Aug 10, 2020
  ef018cb6
Aug 09, 2020
- [X86] Added testcases for PR47024 and PR46315 · 86cc7226
  Dávid Bolvanský authored Aug 09, 2020
  
  86cc7226
- [X86][GlobalISel] Enable a test case for sext i32->i64 that was commented out. · 4e681fad
  Craig Topper authored Aug 09, 2020
  4e681fad
- Fix 64-bit copy to SCC · 62d8b8a2
  Piotr Sobczak authored Jul 30, 2020
  62d8b8a2
- [ARM] Add VADDV and VMLAV patterns for v16i16 · 186a7f81
  David Green authored Aug 09, 2020
  186a7f81
- [ARM] Allow vecreduce_add in tail predicated loops · 8590e5ab
  David Green authored Aug 09, 2020
  8590e5ab
- [X86][GlobalISel] Remove unneeded code for handling zext i8->16, i8->i64, i16->i64, i32->i64. · bc8be305
  Craig Topper authored Aug 09, 2020
  bc8be305
- [DAGCombiner] Teach SimplifySetCC SETUGE X, SINTMIN -> SETLT X, 0 and SETULE... · fdfdee98
  Craig Topper authored Aug 08, 2020
  fdfdee98
- [X86] Autogenerate complete checks. NFC · 95e61ed8
  Craig Topper authored Aug 08, 2020
  
  95e61ed8
- [WebAssembly] Fix FastISel address calculation bug · cc612c29
  Thomas Lively authored Aug 08, 2020
  cc612c29