Commits · fcd545863d27148f26a3ef98bd20501a4df48ec5 · Roger Ferrer / llvm-epi · GitLab

Oct 21, 2022
- [AArch64] Add SVE2.1 target feature for Armv9-A 2022 Architecture Extension · fcd54586
  David Sherwood authored Oct 18, 2022
  fcd54586
- [TwoAddressInstruction] Fix stale LiveVariables info in processStatepoint · 33f78d09
  Jay Foad authored Oct 21, 2022
  33f78d09
- [AArch64] SME2 Multiple vectors int/float binary accumulator and two/four ZA single-vector · 3bee2fb2
  Caroline Concatto authored Oct 21, 2022
  3bee2fb2
- [AArch64]SME2 multi-vec FP/INT down convert 2/4 registers · 830b5e82
  Caroline Concatto authored Oct 20, 2022
  830b5e82
- [AArch64]SME2 Multi-vector - Index/Single/Multi Array Vectors FMA sources · fc0cde8a
  Caroline Concatto authored Oct 20, 2022
  fc0cde8a
- [CostModel][X86] Remove duplicate RUN line from cttz cost tests · ca5fbac7
  Simon Pilgrim authored Oct 21, 2022
  
  ca5fbac7
- [InstCombine] match logical and/or more generally in fold to select · bf75e937
  Sanjay Patel authored Oct 21, 2022
  bf75e937
- [InstCombine] add tests for logical selects; NFC · 5a53fe84
  Sanjay Patel authored Oct 20, 2022
  
  5a53fe84
- [AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers · 1e4f82c2
  Caroline Concatto authored Oct 17, 2022
  1e4f82c2
- [MachineCombiner][RISCV] Relax optimization level requirement · 14a5b9cd
  Anton Sidorenko authored Oct 19, 2022
  14a5b9cd
- [ModuleSummaryAnalysis] Use helper methods to check readnone/readonly (NFC) · eb470e67
  Nikita Popov authored Oct 21, 2022
  eb470e67
- [IndVars] Forget SCEV for value after simplifying condition. · fd236772
  Florian Hahn authored Oct 21, 2022
  fd236772
- [IR] Add support for memory attribute · e9754f02
  Nikita Popov authored Oct 10, 2022
  e9754f02
- [LangRef] Add memory attribute · 9d9de5a5
  Nikita Popov authored Oct 10, 2022
  9d9de5a5
- [Bitcode] Remove redundant intrinsic remangling (NFCI) · c0283297
  Nikita Popov authored Oct 21, 2022
  c0283297
- [X86] Fold scalar_to_vector(i64 zext(x)) -> bitcast(vzext_movl(scalar_to_vector(i32 x))) · 5ca77541
  Simon Pilgrim authored Oct 21, 2022
  5ca77541
- [LoongArch] Stack realignment support · daf067da
  wanglei authored Oct 21, 2022
  daf067da
- [DebugInfo] Fix MSVC warning: "truncation from 'double' to 'float'" · 182d1c2a
  Simon Pilgrim authored Oct 21, 2022
  
  182d1c2a
- [ARM] Fix the type for v4f16 duplane · fb76d2ce
  David Green authored Oct 21, 2022
  fb76d2ce
- [AutoUpgrade] Fix remangling when upgrading struct return type · c8938809
  Nikita Popov authored Oct 21, 2022
  c8938809
- [Verifier] Relieve intrinsics parameter alignment size constrain · 6ade6d25
  Luo, Yuanke authored Oct 20, 2022
  6ade6d25
- [LoongArch] Modify ParserMethod for the simm26_b operand type · 67902920
  wanglei authored Oct 21, 2022
  67902920
- [LLParser] Remove redundant remangling (NFCI) · befb731b
  Nikita Popov authored Oct 21, 2022
  befb731b
- [AutoUpgrade] Fix length check for intrinsic upgrade · d25ef094
  Nikita Popov authored Oct 21, 2022
  d25ef094
- [ARM] Regnereate armv8.2a-fp16-vector-intrinsics.ll test. NFC · 8c1a5086
  David Green authored Oct 21, 2022
  
  8c1a5086
- [VPlan] Print predicates for widened cmp instructions (NFC). · 7eb4ec1c
  Florian Hahn authored Oct 21, 2022
  
  7eb4ec1c
- [AMDGPU][GISel] Constrain selected operands in selectG_BUILD_VECTOR · 1809414f
  Pierre van Houtryve authored Oct 19, 2022
  1809414f
- [AMDGPU][GISel] Re-enable some working tests · ed5fe7f3
  Pierre van Houtryve authored Oct 20, 2022
  ed5fe7f3
- [AMDGPU][DAG] Fix trunc/shift combine condition · 824dd811
  Pierre van Houtryve authored Oct 17, 2022
  824dd811
- [gn build] Port 0332a8e7 · e5f6ad22
  LLVM GN Syncbot authored Oct 21, 2022
  
  e5f6ad22
- [llvm-debuginfo-analyzer] (05/09) - Select elements · 0332a8e7
  Carlos Alberto Enciso authored Oct 20, 2022
  0332a8e7
- [RISCV] Add vscale x 1 cost model tests for compares. NFC · 85166979
  Craig Topper authored Oct 20, 2022
  
  85166979
- [LoongArch] Report error in AsmParser when rd == rk or rd == rj for AM* instructions · c98add7a
  Weining Lu authored Oct 21, 2022
  c98add7a
- [X86][AVX] Eliminate redundant movzbl instruction. · 889911ec
  Luo, Yuanke authored Oct 19, 2022
  889911ec
- [Arm64EC] Refer to dllimport'ed functions correctly. · a6ac9683
  Eli Friedman authored Oct 20, 2022
  a6ac9683
Oct 20, 2022
- [MachineFrameInfo][RISCV] Call ensureStackAlignment for objects created with... · 2c82080f
  Craig Topper authored Oct 20, 2022
  2c82080f
- [NFC] [DirectX backend] move ResourceClass into llvm. · a7183a15
  Xiang Li authored Oct 19, 2022
  a7183a15
- [clang][AIX] Fix mcount name and call arguments · 922f42d5
  Michael Francis authored Oct 18, 2022
  922f42d5
- Revert "[AArch64]SME2 Multi-single vector SVE Destructive 2 and 4 Registers" · 98954470
  Caroline Concatto authored Oct 20, 2022
  98954470
- Revert "[AArch64]SME2 Multi-vector - Index/Single/Multi Array Vectors FMA sources" · c05b1bde
  Caroline Concatto authored Oct 20, 2022
  c05b1bde