Commits · fe17ce0fa6626f79be663ab9948c1ed24d8e2b85 · Roger Ferrer / llvm-epi · GitLab

Jan 13, 2022
- [PowerPC] add RUN lines for both endians to test; NFC · fe17ce0f
  Sanjay Patel authored Jan 13, 2022
  fe17ce0f
- [X86] Add tests showing failure to merge shuffles through avx2 shift binops · 01494c6a
  Simon Pilgrim authored Jan 13, 2022
  
  01494c6a
- [X86] Add tests showing failure to merge shuffles through xop shift binops · ec5b63ba
  Simon Pilgrim authored Jan 13, 2022
  
  ec5b63ba
- [DAG] Add ISD::ROTL/ROTR to TargetLoweringBase::isBinOp · 0c6c588a
  Simon Pilgrim authored Jan 13, 2022
  0c6c588a
- [X86] Add tests showing failure to merge shuffles through rotation binops · 08edc8a7
  Simon Pilgrim authored Jan 13, 2022
  
  08edc8a7
- AMDGPU/GlobalISel: Fix custom legalizatation for fceil · 235886e1
  Petar Avramovic authored Jan 13, 2022
  
  235886e1
- AMDGPU/GlobalISel: Regenerate fceil test (NFC) · 1919d2c9
  Petar Avramovic authored Jan 13, 2022
  
  1919d2c9
- [X86][AVX] lowerShuffleAsLanePermuteAndShuffle - don't split element rotate patterns · 57a551a8
  Simon Pilgrim authored Jan 13, 2022
  57a551a8
- [X86][AVX] Add v8f32/v8i32 01289abc test case · 4f19bb6f
  Simon Pilgrim authored Jan 13, 2022
  4f19bb6f
- [ARM] fix bug causing shrinkwrapping not always being off using PAC · 7c70f96a
  Ties Stuij authored Jan 13, 2022
  7c70f96a
- [WebAssembly] Fix reftype load/store match with idx from call · 97ef15ad
  Paulo Matos authored Jan 13, 2022
  97ef15ad
- [FileCheck] Allow literal '['s before "[[var...]]" · 821dd3b0
  Jay Foad authored Jan 12, 2022
  821dd3b0
- [CodeGen][AArch64] Ensure isSExtCheaperThanZExt returns true for negative constants · 31009f0b
  David Sherwood authored Nov 22, 2021
  31009f0b
- [NFC][AArch64][CodeGen] Add fixed-width vector tests for get.active.lane.mask · ea9394c4
  David Sherwood authored Jan 05, 2022
  ea9394c4
- [NVPTX] Lower fp16 fminnum, fmaxnum to native on sm_80. · cc1b9acf
  Christian Sigg authored Jan 12, 2022
  cc1b9acf
- [RISCV] Add bfp and bfpw intrinsic in zbf extension · 16877c5d
  Lian Wang authored Jan 13, 2022
  16877c5d
- AMDGPU: Fix assert on function argument as loop condition · 1adeebc2
  Matt Arsenault authored Dec 13, 2021
  
  1adeebc2
- GlobalISel: Always enable GISelKnownBits for InstructionSelect · 5a16306c
  Matt Arsenault authored Jan 12, 2022
  5a16306c
- AMDGPU/GlobalISel: Fix assertions on legalize queries with huge align · 4515c24b
  Matt Arsenault authored Jan 12, 2022
  4515c24b
- AMDGPU: Add base test for future optimization patch · ab593baa
  Matt Arsenault authored Jan 09, 2022
  
  ab593baa
- IR: Make getRetAlign check callee function attributes · 3d2d208f
  Matt Arsenault authored Jan 04, 2022
  3d2d208f
- GlobalISel: Add G_ASSERT_ALIGN hint instruction · 07ddfa95
  Matt Arsenault authored Jan 04, 2022
  07ddfa95
- [AArch64][GlobalISel] Re-generate checks for a test. · b9499e14
  Amara Emerson authored Jan 12, 2022
  
  b9499e14
Jan 12, 2022
- [RISCV] Remove stale references to experimental-b. NFC · 15a78f9d
  Craig Topper authored Jan 12, 2022
  15a78f9d
- [RISCV] Update recently ratified Zb{a,b,c,s} extensions to no longer be experimental · 33d008b1
  Alex Bradbury authored Jan 12, 2022
  33d008b1
- AMDGPU/GlobalISel: Regenerate mir test checks · 22e67226
  Matt Arsenault authored Jan 12, 2022
  
  22e67226
- AMDGPU/GlobalISel: Do not use terminator copy before waterfall loops · bd2c01e9
  Matt Arsenault authored Jan 11, 2022
  bd2c01e9
- GlobalISel: Fix insert point in localizer · 8a16201a
  Matt Arsenault authored Jan 11, 2022
  8a16201a
- GlobalIsel: Fix fma combine when one of the operands comes from unmerge · c8c5dc76
  Petar Avramovic authored Jan 12, 2022
  c8c5dc76
- GlobalIsel: Precommit fma combine tests with one operand from unmerge · 9f38a681
  Petar Avramovic authored Jan 12, 2022
  
  9f38a681
- [X86][AVX2] Add SimplifyDemandedVectorElts handling for avx2 per element shifts · de3808c8
  Simon Pilgrim authored Jan 12, 2022
  de3808c8
- [X86][AVX2] Add tests for missing demanded elts handling for avx2 per element shifts · 0c8d30a3
  Simon Pilgrim authored Jan 12, 2022
  0c8d30a3
- [NFC] Run script to autogenerate CHECK lines for CodeGen/AArch64/fast-isel-cmp-vec.ll · b5493ff5
  David Sherwood authored Jan 12, 2022
  
  b5493ff5
- [X86][XOP] Add SimplifyDemandedVectorElts handling for xop shifts · c2426fdc
  Simon Pilgrim authored Jan 12, 2022
  c2426fdc
- [X86][XOP] Add tests for missing demanded elts handling for xop shifts · 13362abf
  Simon Pilgrim authored Jan 12, 2022
  13362abf
- [X86][MS] Change the alignment of f80 to 16 bytes on Windows 32bits to match with ICC · 1bb0caf5
  Phoebe Wang authored Dec 17, 2021
  1bb0caf5
- [ARM] Remove FeaturePerfMon from armv7-m · 351edf1c
  David Green authored Jan 12, 2022
  351edf1c
- [X86][ABI] Pre-commit test for the f80 ABI alignment change. NFC · 95a436f8
  Phoebe Wang authored Dec 17, 2021
  
  95a436f8
- [DAGCombiner][AArch64] precommit some tests for D116915 NFC · dc01fb1d
  zhongyunde authored Jan 12, 2022
  dc01fb1d
- [AMDGPU] Do not reserve any VGPR for SGPR spills · 8470bf2b
  Austin Kerbow authored Jan 11, 2022
  8470bf2b