Commits · ff0ddd5ce4763b169ba4b983a0a97c3b5f51f014 · Roger Ferrer / llvm-epi · GitLab

Apr 26, 2021
- [TableGen] Remove a TODO comment that is no longer relevant [NFC] · ff0ddd5c
  Paul C. Anagnostopoulos authored Apr 26, 2021
  
  ff0ddd5c
- Only ignore -Wdeprecated-copy if the used compiler supports the warning · b125c034
  Dávid Bolvanský authored Apr 26, 2021
  b125c034
- [TableGen] Change assertion information from a tuple to a struct [NFC] · 2d4c4d3c
  Paul C. Anagnostopoulos authored Apr 20, 2021
  2d4c4d3c
- [SYCL] Implement SYCL address space attributes handling · 7818906c
  Alexey Bader authored Dec 20, 2019
  7818906c
- [InstCombine] C - ctpop(a) - > ctpop(~a)) if C is bitwidth (PR50104) · 691badc3
  Dávid Bolvanský authored Apr 26, 2021
  691badc3
- AArch64: support atomics in GISel · 8705399d
  Tim Northover authored Apr 22, 2021
  
  8705399d
- [lldb] Use forward type in pointer-to-member · e439a463
  Emre Kultursay authored Apr 26, 2021
  e439a463
- [AMDGPU][llvm-objdump] Add lit.local.cfg missing from recent commit · 18adf4bb
  Tim Renouf authored Apr 26, 2021
  18adf4bb
- [MC][AMDGPU][llvm-objdump] Synthesized local labels in disassembly · 8710eff6
  Tim Renouf authored Apr 23, 2021
  8710eff6
- [IndVars] avoid 'tmp' names in test file with auto-generated CHECK lines; NFC · 9e8cde59
  Sanjay Patel authored Apr 26, 2021
  9e8cde59
- [LSR][DebugInfo] Don't unnecessarily drop DebugLocs · cc7803ee
  Yuanbo Li authored Apr 26, 2021
  cc7803ee
- [AArch64][SVE] Add missing patterns for scalar versions of SQSHL/UQSHL · 2040d20d
  Bradley Smith authored Apr 22, 2021
  2040d20d
- [InstCombine] Added testcases for PR50104, NFC · 819d35e6
  Dávid Bolvanský authored Apr 25, 2021
  
  819d35e6
- [ARM] Expand VMOVRRD simplification pattern · 94c7bd7e
  David Green authored Apr 26, 2021
  94c7bd7e
- [ARM] Additional soft float BE test. NFC · b1a919d5
  David Green authored Apr 26, 2021
  
  b1a919d5
- [NFC] Add scalable vectorisation tests for int/FP <> int/FP conversions · cf727682
  David Sherwood authored Apr 06, 2021
  cf727682
- [AArch64] Add AArch64TTIImpl::getMaskedMemoryOpCost function · a458b785
  David Sherwood authored Apr 16, 2021
  a458b785
- [VPlan] Make blocksOnly work properly with ranges over const pointers. · 7302fe43
  Florian Hahn authored Apr 26, 2021
  7302fe43
- [flang][driver] Fine-tune `-fdebug-dump-symbols` · 499f1ed5
  Andrzej Warzynski authored Apr 16, 2021
  499f1ed5
- [Clang][Coroutine][DebugInfo] Relax test ordering requirement · 3c9bcf0e
  Jeremy Morse authored Apr 26, 2021
  3c9bcf0e
- [clang-format] fix indent in alignChainedConditionals · 5987d7c5
  Krasimir Georgiev authored Apr 22, 2021
  5987d7c5
- [ARM] Ensure loop invariant active.lane.mask operands · 258e2e9a
  David Green authored Apr 26, 2021
  258e2e9a
- [RISCV] Add REQUIRES: riscv-registered-target for RISC-V test cases. · 16dc9afa
  Hsiangkai Wang authored Apr 26, 2021
  
  16dc9afa
- [llvm-dwarfdump] Fix split-dwarf bug in stats for inlined var loc cov · 6ba150db
  Djordje Todorovic authored Apr 26, 2021
  6ba150db
- [clang][deps] NFC: Fix typo · 9ab4eab5
  Jan Svoboda authored Apr 26, 2021
  
  9ab4eab5
- [clang][deps] Only generate absolute paths when asked to · 0f7d4105
  Jan Svoboda authored Apr 22, 2021
  0f7d4105
- [OpenCL] Add inc/dec/cmpxchg C++ legacy atomics with generic · 18772de1
  Sven van Haastregt authored Apr 26, 2021
  18772de1
- [RISCV] Implement the vwcvt{u}.x.x.v/vncvt.x.x.w builtin. · bd32c2d6
  Hsiangkai Wang authored Apr 20, 2021
  bd32c2d6
- [RISCV] Implement the pseudo compare builtin. · 645c5f27
  Hsiangkai Wang authored Apr 20, 2021
  645c5f27
- [RISCV] Implement the vfabs.v/vfneg.v builtin. · bfb3fca7
  Hsiangkai Wang authored Apr 20, 2021
  bfb3fca7
- [RISCV] Implement the vmmv.m/vmnot.m builtin. · 4b243417
  Hsiangkai Wang authored Apr 20, 2021
  4b243417
- [RISCV] Cleanup setOperationAction calls for INTRINSIC_WO_CHAIN/INTRINSIC_W_CHAIN · 837442de
  Craig Topper authored Apr 25, 2021
  837442de
- [RISCV] Optimize addition with immediate · 60ed86d3
  Ben Shi authored Apr 26, 2021
  60ed86d3
- [RISCV] Teach DAG combine what bits Zbp instructions demanded from their inputs. · 8f5cd494
  Craig Topper authored Apr 25, 2021
  8f5cd494
- [RISCV] [1/2] Add IR intrinsic for Zbe extension · 8cf54c7f
  Levy Hsu authored Apr 25, 2021
  8cf54c7f
- [DebugInfo][AIX] Set target debugger-tune default to dbx · 2c902817
  Jinsong Ji authored Apr 25, 2021
  2c902817
- [ORC] Avoid invalidating iterators in EHFrameRegistrationPlugin. · c1baf946
  Lang Hames authored Apr 25, 2021
  c1baf946
- [clangd] Rename HeuristicResolver::resolveCallExpr() to resolveTypeOfCallExpr() · c624e701
  Nathan Ridge authored Apr 19, 2021
  c624e701
- [clangd] Omit parameter hint for setter functions · 6f6cf2da
  Nathan Ridge authored Apr 18, 2021
  6f6cf2da
- [clangd] Omit parameter hint if parameter name comment is present · 753b247d
  Nathan Ridge authored Apr 18, 2021
  753b247d