Commits · ff5ddf75e3b5eee33beece5216ad276b0b631fd9 · Roger Ferrer / llvm-epi · GitLab

Apr 23, 2018
- [X86] Add disassembler test cases for bswap. · ff5ddf75
  Craig Topper authored Apr 23, 2018
  ff5ddf75
- [AArch64][SVE] Asm: Support for contiguous, non-faulting LDNF1 (scalar+imm) load instructions · 7893f722
  Sander de Smalen authored Apr 23, 2018
  7893f722
- [AArch64][SVE] Asm: Support for structured ST2, ST3 and ST4 (scalar+imm) store instructions. · 1b6d3744
  Sander de Smalen authored Apr 23, 2018
  1b6d3744
- [X86] Add VEX_WIG to VEX encoded version of VCMPPSY/VCMPPDY. · 3f1d5381
  Craig Topper authored Apr 23, 2018
  3f1d5381
Apr 22, 2018
- [test] Fix MC/ELF/nocompression.s · 3eecf73b
  Jonas Devlieghere authored Apr 22, 2018
  3eecf73b
- [llvm-mc] Make error handling more consistent. · c976aa7d
  Jonas Devlieghere authored Apr 22, 2018
  c976aa7d
- [X86] Remove DATA32_PREFIX. Hack the printing for DATA16_PREFIX to print... · e33ed7d6
  Craig Topper authored Apr 22, 2018
  e33ed7d6
Apr 20, 2018
- [X86] WaitPKG instructions · 31fa8025
  Gabor Buella authored Apr 20, 2018
  31fa8025
- [AArch64][SVE] Asm: Support for contiguous LD1 (scalar+scalar) load instructions. · 30f9f11d
  Sander de Smalen authored Apr 20, 2018
  30f9f11d
- [AArch64][SVE] Fix diagnostic for SVE LD4 instructions: · 137efb23
  Sander de Smalen authored Apr 20, 2018
  137efb23
- [WebAssembly] Enabled -triple=wasm32-unknown-unknown-wasm path using ELF directive parser. · f009da24
  Sam Clegg authored Apr 19, 2018
  f009da24
Apr 19, 2018
- [mips] Guard some macro expansions properly · fdc05268
  Simon Dardis authored Apr 19, 2018
  fdc05268
Apr 18, 2018
- Revert "[RISCV] implement li pseudo instruction" · 099c7204
  Alex Bradbury authored Apr 18, 2018
  099c7204
Apr 17, 2018
- [RISCV] implement li pseudo instruction · 480b7bc9
  Alex Bradbury authored Apr 17, 2018
  480b7bc9
Apr 16, 2018
- [AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32 · 4c45e6ff
  Dmitry Preobrazhensky authored Apr 16, 2018
  4c45e6ff
- [AArch64][SVE] Asm: Support for structured LD4 (scalar+imm) load instructions. · 7a210db8
  Sander de Smalen authored Apr 16, 2018
  7a210db8
- [AArch64][SVE] Asm: Support for structured LD3 (scalar+imm) load instructions. · d239eb3c
  Sander de Smalen authored Apr 16, 2018
  d239eb3c
- [mips] Restrict certain trap instructions for micromipsr6 · 86d638ec
  Stefan Maksimovic authored Apr 16, 2018
  86d638ec
- [AArch64][SVE] Asm: Support for structured LD2 (scalar+imm) load instructions. · f836af86
  Sander de Smalen authored Apr 16, 2018
  f836af86
Apr 14, 2018
- [X86] Add the bizarro movsww and movzww mnemonics for the disassembler. · 95f421cf
  Craig Topper authored Apr 13, 2018
  95f421cf
- MachO: trap unreachable instructions · 271d3d27
  Tim Northover authored Apr 13, 2018
  271d3d27
Apr 13, 2018
- [ARC] Add LImm support for J/JL · 545a0c2f
  Yan Luo authored Apr 13, 2018
  545a0c2f
- [AArch64][SVE] Asm: Support for contiguous LD1 (scalar+imm) load instructions · 5b12db5d
  Sander de Smalen authored Apr 13, 2018
  5b12db5d
- [AArch64][SVE] Asm: Support for contiguous ST1 (scalar+imm) store instructions. · 5c62598b
  Sander de Smalen authored Apr 13, 2018
  5c62598b
- [X86] Introduce cldemote instruction · 604be442
  Gabor Buella authored Apr 13, 2018
  604be442
Apr 12, 2018
- [WebAssembly] libObject: Don't include the name the size of custom sections · 9745afa6
  Sam Clegg authored Apr 12, 2018
  9745afa6
- [RISCV] Add c.mv rs1, rs2 pattern for addi rs1, rs2, 0 · e8b7ff30
  Sameer AbuAsal authored Apr 12, 2018
  e8b7ff30
- [mips] Correct the predicates of the load/store (double)word for coprocessor 3. · d886aba3
  Simon Dardis authored Apr 12, 2018
  d886aba3
- [mips] Correct the predicates for special nops, tlb ctrl instrs, software breakpoint and prefx. · a5a3c38c
  Simon Dardis authored Apr 12, 2018
  a5a3c38c
Apr 11, 2018
- [X86] Describe wbnoinvd instruction · 2ef36f35
  Gabor Buella authored Apr 11, 2018
  2ef36f35
- [DWARFv5] Fuss with asm syntax for conveying MD5 checksum. · 0195469a
  Paul Robinson authored Apr 11, 2018
  0195469a
- [AMDGPU][MC][GFX9] Added v_screen_partition_4se_b32 · fc715551
  Dmitry Preobrazhensky authored Apr 11, 2018
  fc715551
- [AArch64][AsmParser] Unify code for parsing Neon/SVE vectors. · 73937b7c
  Sander de Smalen authored Apr 11, 2018
  73937b7c
Apr 10, 2018
- Recommit r329716 "Add missing nullptr check before getSection() to... · a450ed23
  Jessica Paquette authored Apr 10, 2018
  a450ed23
- Revert 329716 "Add missing nullptr check before getSection() to... · c140bbdd
  Jessica Paquette authored Apr 10, 2018
  c140bbdd
- Fix test failure in arm64-no-section.ll · cda4add2
  Jessica Paquette authored Apr 10, 2018
  cda4add2
- Add missing nullptr check to AArch64MachObjectWriter::recordRelocation · e4b90d82
  Jessica Paquette authored Apr 10, 2018
  e4b90d82
- AArch64: diagnose unpredictable store-exclusive instructions · 6a1c51bf
  Tim Northover authored Apr 10, 2018
  6a1c51bf
- [AArch64][SVE] Asm: Add support for unpredicated LSL/LSR (shift by immediate) instructions. · f974e255
  Sander de Smalen authored Apr 10, 2018
  f974e255
- [AArch64][SVE] Asm: Add support for SVE INDEX instructions. · 30fda45c
  Sander de Smalen authored Apr 10, 2018
  30fda45c