Commits · ff9958b70e959bf48f5d308fb4431c76d3984ae4 · Roger Ferrer / llvm-epi · GitLab

Aug 04, 2021
- [X86] Rename X86 tuning feature flag FeatureHasFastGather -> FeatureFastGather · 8cd40ece
  Simon Pilgrim authored Aug 04, 2021
  8cd40ece
- [X86] Move FeatureFastBEXTR from bdver2 features to tuning · 17e8ac07
  Simon Pilgrim authored Aug 04, 2021
  17e8ac07
- Revert "Introduce intrinsic llvm.isnan" · 0c28a7c9
  Serge Pavlov authored Aug 04, 2021
  0c28a7c9
- [X86] Split Subtarget ISA / Security / Tuning Feature Flags Definitions. NFC · fc8dee1e
  Simon Pilgrim authored Aug 04, 2021
  fc8dee1e
- X86: fix frame offset calculation with mandatory tail calls · d7b0e552
  Tim Northover authored Aug 04, 2021
  d7b0e552
- Introduce intrinsic llvm.isnan · 16ff91eb
  Serge Pavlov authored Aug 04, 2021
  16ff91eb
- [FuncSpec] Support specialising recursive functions · 30fbb069
  Sjoerd Meijer authored Aug 03, 2021
  30fbb069
- [Support] Initialize common options in `getRegisteredOptions` · 486b6013
  Senran Zhang authored Aug 03, 2021
  486b6013
- [AMDGPU] Ignore call graph node which does not have function info. · 596e61c3
  hsmahesha authored Aug 04, 2021
  596e61c3
- [NFC][ConstantFold] Check getAggregateElement before getSplatValue call · df4e0bea
  Senran Zhang authored Aug 03, 2021
  df4e0bea
- [WebAssembly] Misc. cosmetic changes in EH (NFC) · 9bd02c43
  Heejin Ahn authored Aug 01, 2021
  9bd02c43
- [MC][CodeGen] Emit constant pools earlier · ad253446
  Arthur Eubanks authored Aug 02, 2021
  ad253446
- [MLGO] Update the current model url for the Oz inliner model. · b16c37fa
  Jacob Hegna authored Aug 04, 2021
  
  b16c37fa
- [AArch64][GlobalISel] Widen G_SELECT before clamping it · 56437363
  Jessica Paquette authored Aug 03, 2021
  56437363
- [GlobalOpt] Fix the load types when OptimizeGlobalAddressOfMalloc · 2d9759c7
  Shimin Cui authored Aug 03, 2021
  2d9759c7
- [SimplifyCFG] Enable switch to lookup table for more types. · b818da27
  Craig Topper authored Aug 03, 2021
  b818da27
Aug 03, 2021
- [RISCV] Add scheduling resources for V · 63a5ac4e
  Evandro Menezes authored Jul 24, 2021
  63a5ac4e
- [ThinLTO] Add TimeTrace for Thinlink step · f5b8a312
  modimo authored Aug 03, 2021
  f5b8a312
- [SLP]Do not emit extra shuffle for insertelements vectorization. · 871ea698
  Alexey Bataev authored Aug 02, 2021
  871ea698
- Revert "[SLP]Improve graph reordering." · 7d9d926a
  Alexey Bataev authored Aug 03, 2021
  7d9d926a
- ThinLTO: Fix inline assembly references to static functions with CFI · 7ce1c4da
  Sami Tolvanen authored Aug 03, 2021
  7ce1c4da
- [InstCombine] Fixed select + masked load fold failure · 3943a746
  Dylan Fleming authored Aug 03, 2021
  3943a746
- [runtimeunroll] A bit of style cleanup to simplify a following change [NFC] · 223835f0
  Philip Reames authored Aug 03, 2021
  223835f0
- [AArch64] Prefer fmov over orr v.16b when copying f32/f64 · bd07c2e2
  David Green authored Aug 03, 2021
  bd07c2e2
- [RISCV] Indicate that RISCVMergeBaseOffsetOpt preserves the CFG. · deaeb16d
  Craig Topper authored Aug 02, 2021
  deaeb16d
- [DAG] Cleanup DAGCombiner::CombineConsecutiveLoads early-outs. NFCI. · 11396641
  Simon Pilgrim authored Aug 03, 2021
  11396641
- Revert "[InstCombine] Remove nnan requirement for transformation to fabs from select" · 946fd4ea
  Krishna authored Aug 03, 2021
  946fd4ea
- [InstCombine] Fold phi ( inttoptr/ptrtoint x ) to phi (x) · d9926064
  Krishna authored Aug 02, 2021
  d9926064
- [InstCombine] Remove nnan requirement for transformation to fabs from select · 6180ce2e
  Krishna authored Aug 02, 2021
  6180ce2e
- [X86] Add title comment to separate the "CPU Families" features from the other... · d3917bbf
  Simon Pilgrim authored Aug 03, 2021
  d3917bbf
- [RISCV] Support simple fractional steps in matching VID sequences · cba6aab9
  Fraser Cormack authored Jul 16, 2021
  cba6aab9
- [AArch64InstPrinter] Change printAddSubImm to comment imm value when shifted · 0d8cd4e2
  Jason Molenda authored Aug 03, 2021
  0d8cd4e2
- [llvm-readobj][XCOFF] Fix the error dumping for the first · 69396896
  Esme-Yi authored Aug 03, 2021
  69396896
- [NFC] Rename enable-strict-reductions to force-ordered-reductions · 0156f91f
  David Sherwood authored Aug 02, 2021
  0156f91f
- [AArch64][AsmParser] NFC: Use helpers in matrix tile list parsing · a02bbeea
  Cullen Rhodes authored Aug 03, 2021
  
  a02bbeea
- [AMDGPU] Legalize operands of V_ADDC_U32_e32 and friends · 40202b13
  Jay Foad authored Jul 27, 2021
  40202b13
- Reland: "[WebAssembly] Add new pass to lower int/ptr conversions of reftypes" · d3a0a65b
  Paulo Matos authored Jul 28, 2021
  d3a0a65b
- [RISCV] Teach VSETVLI insertion to merge the unused VSETVLI with the one need... · 7900ee0b
  Jianjian GUAN authored Aug 03, 2021
  7900ee0b
- [RuntimeDyldChecker] Delete comparision of integers of different signs · 0023caf9
  luxufan authored Aug 03, 2021
  
  0023caf9
- [RuntimeDyldChecker] Support offset in decode_operand expr · f4e418ac
  luxufan authored Aug 02, 2021
  f4e418ac