Commits · fffb6e6afdbaba563189c1f715058ed401fbc88d · Roger Ferrer / llvm-epi · GitLab

May 06, 2022
- [AArch64] Fix sub with carry · fffb6e6a
  Kazu Hirata authored May 06, 2022
  fffb6e6a
- [DAGCombine] Make combineShuffleOfBitcast LittleEndian specific · 891c3cf9
  David Green authored May 06, 2022
  891c3cf9
- [riscv] Add strict asserts for VSETVLI insertion algorithm to help catch bugs · f486119c
  Philip Reames authored May 05, 2022
  f486119c
- [AArch64] Add extra reverse costs. · dccc69a3
  David Green authored May 06, 2022
  dccc69a3
- [InstCombine] Add tests for combining AArch64 neon min/max intrinsics. · 1d042312
  Florian Hahn authored May 06, 2022
  
  1d042312
- [SimplifyLibcalls] Tests for libcall folding of subobjects [NFC] · cc2ce81b
  Martin Sebor authored May 06, 2022
  cc2ce81b
- [SelectionDAG] Improve asserts in SelectionDAG::getSelect. · 2ca78d2b
  Craig Topper authored May 06, 2022
  2ca78d2b
- [SelectionDAG] Clear promoted bits before UREM on shift amount in PromoteIntRes_FunnelShift. · 76f90a9d
  Craig Topper authored May 06, 2022
  76f90a9d
- Automatically generates several X86/sse tests cases. NFC · 324d696c
  Amaury Séchet authored May 06, 2022
  
  324d696c
- Automatically generate CodeGen/X86/sse-align-*.ll test cases. NFC · d955010d
  Amaury Séchet authored May 06, 2022
  
  d955010d
- [InstCombine] Fold icmp of select with implied condition · 82190f91
  Nikita Popov authored May 06, 2022
  82190f91
- [InstCombine] Add icmp of select with implied condition tests (NFC) · a94589d5
  Nikita Popov authored May 06, 2022
  
  a94589d5
- [MC][X86] Add vcmpps disassembler tests for Issue #41491 · c0840799
  Simon Pilgrim authored May 06, 2022
  c0840799
- [DAG] visitREM - merge buildOptimizedSREM into if(). NFCI. · c0bebc12
  Simon Pilgrim authored May 06, 2022
  
  c0bebc12
- [InstCombine] Fold icmp of select with non-constant operand · 0863abe3
  Nikita Popov authored May 06, 2022
  0863abe3
- [InstCombine] Add additional icmp of select tests (NFC) · d7b6fd47
  Nikita Popov authored May 06, 2022
  
  d7b6fd47
- [gn build] Port 586efd52 · 1df36d56
  LLVM GN Syncbot authored May 06, 2022
  
  1df36d56
- [gn build] Port 37ba1b9d · 6d74721a
  LLVM GN Syncbot authored May 06, 2022
  
  6d74721a
- [Support] Fix asan AllocatorTest after ba0d50ad · 56ee5d93
  Sam McCall authored May 06, 2022
  56ee5d93
- [SLP][X86] Add test coverage for Issue #51088 · cbd300f6
  Simon Pilgrim authored May 06, 2022
  
  cbd300f6
- [RS4GC] Add support for 'freeze' instruction to findBaseDefiningValue · 5a08e817
  Max Kazantsev authored May 06, 2022
  5a08e817
- [gn build] try to (manually) port 9ef451d1 (hwasan_symbolize) · 07a83b55
  Nico Weber authored May 06, 2022
  07a83b55
- [NFC] Fix typo in assert message · e6a7afae
  Max Kazantsev authored May 06, 2022
  
  e6a7afae
- [MLIR] Fix build with make · 686bd6dd
  Nikita Popov authored May 05, 2022
  686bd6dd
- [InstCombine] Extract icmp of select transform (NFC) · b457ac42
  Nikita Popov authored May 06, 2022
  b457ac42
- [CostModel][X86] Relax fcmp costs on SSE41 targets or later · 3d107ce2
  Simon Pilgrim authored May 06, 2022
  3d107ce2
- [InstCombine] Fix scalable-vector bitwise select matching · bafab9c0
  Fraser Cormack authored May 05, 2022
  bafab9c0
- [CostModel][X86] Adjust 128-bit select costs to account for slow BLENDV op · cbfa8573
  Simon Pilgrim authored May 06, 2022
  cbfa8573
- [RISCV] Add an extra vsetvli insertion test · 588155aa
  Fraser Cormack authored May 06, 2022
  588155aa
- [CostModel][X86] Adjust pre-SSE41 fp scalar select costs to account for vector ops · d21bf514
  Simon Pilgrim authored May 06, 2022
  d21bf514
- Generalize "check-all" umbrella targets, use for check-clang-tools · 7cc8377f
  Sam McCall authored Mar 16, 2022
  7cc8377f
- [CostModel][X86] Adjust 256-bit select costs to account for slow BLENDV op · f0e8c1d6
  Simon Pilgrim authored May 06, 2022
  f0e8c1d6
- [SLP][X86] Regenerate ssat tests to remove defunct AVX1/AVX2 checks · f22e993e
  Simon Pilgrim authored May 06, 2022
  
  f22e993e
- [DAG][PowerPC] Combine shuffle(bitcast(X), Mask) to bitcast(shuffle(X, Mask')) · 115c1888
  David Green authored May 06, 2022
  115c1888
- [CostModel][X86] Add more complete float/double select cost test coverage · 4236a107
  Simon Pilgrim authored May 06, 2022
  4236a107
- [RISCV] Enable MachineOutliner by default under -Oz for RISCV · 4ff5e818
  Pengcheng Wang authored May 06, 2022
  4ff5e818
- [SimpleLoopUnswitch] Collect either logical ANDs/ORs but not both. · db7a87ed
  Florian Hahn authored May 06, 2022
  db7a87ed
- [fastregalloc] Add test case for self loop (D125079). · 54fe59ef
  Luo, Yuanke authored May 06, 2022
  
  54fe59ef
- [Instrumentation] Share InstrumentationIRBuilder between TSan and SanCov · 9ae87b59
  Marco Elver authored May 06, 2022
  9ae87b59
- [VectorCombine] Fold shuffle select pattern · 100cb9a2
  David Green authored May 06, 2022
  100cb9a2