Commits · 07ed62b7d5514937a50b4af4feaa1969911d142e · Lorenzo Albano / LLVM bpEVL · GitLab

Mar 20, 2021
- [RISCV] Disable (mul (and X, 0xffffffff), (and Y, 0xffffffff)) optimization when Zba is enabled. · 07ed62b7
  Craig Topper authored Mar 20, 2021
  07ed62b7
- [RISCV] Add isel pattern to optimize (mul (and X, 0xffffffff), (and Y, 0xffffffff)) on RV64 · b0d8823a
  Craig Topper authored Mar 20, 2021
  b0d8823a
- [BranchProbability] move options for 'likely' and 'unlikely' · ee8b5381
  Sanjay Patel authored Mar 20, 2021
  ee8b5381
- [VE] Fix types of multiclass template arguments in TableGen files · 879760c2
  Fangrui Song authored Mar 20, 2021
  879760c2
- Revert of D49126 [PredicateInfo] Use custom mangling to support ssa_copy with unnamed types. · 77080a1e
  Jeroen Dobbelaere authored Mar 20, 2021
  77080a1e
- [X86] Fix a bug when calculating the ldtilecfg insertion points. · 2327513b
  Wang, Pengfei authored Mar 20, 2021
  2327513b
- [CFLGraph] Fix a crash due to missing handling of freeze · 319d093b
  Juneyoung Lee authored Mar 21, 2021
  319d093b
- [AMDGPU] Add MDT update missing from D98915 · 6c9cac5d
  Carl Ritson authored Mar 20, 2021
  
  6c9cac5d
- [PowerPC][NFC] Do not produce i64 constants in 32-bit mode · ea48bf86
  Nemanja Ivanovic authored Mar 19, 2021
  ea48bf86
- [RISCV] Rename WriteShift/ReadShift scheduler classes to... · d5c1d305
  Craig Topper authored Mar 19, 2021
  d5c1d305
- [AMDGPU] Rename SIInsertSkips Pass · fe5f4c39
  Carl Ritson authored Mar 20, 2021
  fe5f4c39
- [AMDGPU] Merge SIRemoveShortExecBranches into SIPreEmitPeephole · 5df2af8b
  Carl Ritson authored Mar 20, 2021
  5df2af8b
- [AMDGPU] Allow index optimisation in SIPreEmitPeephole for bundles · b76c0902
  Carl Ritson authored Mar 20, 2021
  b76c0902
- [NFC] [PowerPC] Determine Endianness in PPCTargetMachine · 697f90eb
  Anshil Gandhi authored Mar 19, 2021
  697f90eb
- [JITLink] Don't issue lookups for empty symbol sets. · 602e19ed
  Lang Hames authored Mar 19, 2021
  602e19ed
- Add type attributes to LLVM C API · 528f6f7d
  Christoffer Lernö authored Mar 19, 2021
  528f6f7d
Mar 19, 2021
- [NewPM] Verify LoopAnalysisResults after a loop pass · a17394dc
  Arthur Eubanks authored Mar 19, 2021
  a17394dc
- [GlobalISel] Add G_SBFX + G_UBFX (bitfield extraction opcodes) · 4773dd5b
  Jessica Paquette authored Mar 11, 2021
  4773dd5b
- Revert "[NewPM] Verify LoopAnalysisResults after a loop pass" · a1ab5627
  Arthur Eubanks authored Mar 19, 2021
  a1ab5627
- [NewPM] Verify LoopAnalysisResults after a loop pass · 94c269ba
  Arthur Eubanks authored Mar 17, 2021
  94c269ba
- [AArch64] Fix LowerMGATHER to return the chain result for floating point gathers. · 1066dcb5
  Craig Topper authored Mar 19, 2021
  1066dcb5
- [ARM] Tone down the MVE scalarization overhead · a2e0312c
  David Green authored Mar 19, 2021
  a2e0312c
- Update basic deref API to account for possiblity of free [NFC] · 5698537f
  Philip Reames authored Mar 19, 2021
  5698537f
- [Cost]Canonicalize the cost for logical or/and reductions. · 14ae0cf0
  Alexey Bataev authored Mar 02, 2021
  14ae0cf0
- [RISCV] Add missing bitcasts to the results of lowerINSERT_SUBVECTOR and... · 5d315691
  Craig Topper authored Mar 19, 2021
  5d315691
- [Hexagon] Return an i64 for result 0 from LowerREADCYCLECOUNTER instead of an i32. · 95998b89
  Craig Topper authored Mar 19, 2021
  95998b89
- [NFC][VPlan] Guard print routines with "#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)" · 92205cb2
  Andrei Elovikov authored Mar 19, 2021
  92205cb2
- [VPlan] Add plain text (not DOT's digraph) dumps · 93a9d2de
  Andrei Elovikov authored Mar 18, 2021
  93a9d2de
- [RISCV] Lower scalable vector masked loads to intrinsics to match fixed... · 85f3f6b3
  Craig Topper authored Mar 19, 2021
  85f3f6b3
- [RISCV] Maintain fixed-length info when optimizing BUILD_VECTORs · d399b82e
  Fraser Cormack authored Mar 19, 2021
  d399b82e
- [SCEV] Factor out a lambda for strict condition splitting [NFC] · 00d0315a
  Philip Reames authored Mar 19, 2021
  
  00d0315a
- [RISCV] Fix missing scalable->fixed-length vector conversion · 550292ec
  Fraser Cormack authored Mar 17, 2021
  550292ec
- [DAG] computeKnownBits - add ISD::MULHS/MULHU/SMUL_LOHI/UMUL_LOHI handling · 9d2df964
  Simon Pilgrim authored Mar 19, 2021
  9d2df964
- [AMDGPU] Remove dead glc1 handing in asm parser. NFC. · 57effe22
  Stanislav Mekhanoshin authored Mar 19, 2021
  
  57effe22
- [DAG] Fold shuffle(bop(shuffle(x,y),shuffle(z,w)),undef) -> bop(shuffle'(x,y),shuffle'(z,w)) · ffb28871
  Simon Pilgrim authored Mar 19, 2021
  ffb28871
- [TableGen] Improve handling of template arguments · a9fc44c5
  Paul C. Anagnostopoulos authored Feb 25, 2021
  a9fc44c5
- [M68k] Replace unknown operand with explicit type · 028d6250
  Ricky Taylor authored Mar 17, 2021
  028d6250
- Support intrinsic overloading on unnamed types · 04790d9c
  Jeroen Dobbelaere authored Mar 19, 2021
  04790d9c
- [PowerPC] Fix the check for 16-bit signed field in peephole · a8697c57
  Nemanja Ivanovic authored Mar 19, 2021
  a8697c57
- [SystemZ][z/OS] Distinguish between text and binary files on z/OS · 4f750f6e
  Abhina Sreeskantharajan authored Mar 19, 2021
  4f750f6e