Commits · 18557c26beefe2fcd2d8d6f4e91dad3ee66ca1b7 · Lorenzo Albano / LLVM bpEVL · GitLab

Aug 23, 2022
- [TwoAddressInstruction] Handle pointer compare sunk past statepoint. · d1fd791e
  Denis Antrushin authored Aug 19, 2022
  d1fd791e
- [LoopUtils] Remove unused Loop arg from addDiffRuntimeChecks (NFC). · ff344326
  Florian Hahn authored Aug 23, 2022
  ff344326
- [LoongArch] Optimize the atomic store with amswap_db.[w/d] · e9a4b8e3
  gonglingqin authored Aug 23, 2022
  e9a4b8e3
- [llvm-profdata][NFC] fix warning · e36a71d8
  liaochunyu authored Aug 23, 2022
  e36a71d8
- [VE] Support inlineasm memory operand · b88aba9d
  Kazushi (Jam) Marukawa authored Aug 22, 2022
  b88aba9d
- [NFC]] Use llvm::all_of instead of std::all_of · 9181ab92
  liqinweng authored Aug 23, 2022
  9181ab92
- [DFSan] Fix handling of libAtomic external functions. · 065d2e1d
  Andrew Browne authored Aug 17, 2022
  065d2e1d
- [DirectX] Remove broken assert · eebf84c5
  Chris Bieneman authored Aug 22, 2022
  eebf84c5
- [TTI] Use OperandValueInfo in getArithmeticInstrCost implementation [NFC] · 104fa367
  Philip Reames authored Aug 20, 2022
  104fa367
Aug 22, 2022
- [X86][AArch64][WebAsm][RISCV] Query operand properties instead of using enums directly [nfc] · 478cf943
  Philip Reames authored Aug 22, 2022
  478cf943
- [X86][TTI] Rename OpNInfo to OpNKind [nfc] · 5e87a020
  Philip Reames authored Aug 22, 2022
  5e87a020
- Revert "[ARM] Use getSymbolPreferLocal() in GetARMGVSymbol" · 8c8cfaaf
  Alan Zhao authored Aug 22, 2022
  8c8cfaaf
- [DebugInfo] Let InstrRefBasedLDV handle joins for lists of debug ops · 53fd5af6
  Stephen Tozer authored Jun 18, 2022
  53fd5af6
- [ModuloSchedule] Add interface call to accept/reject SMS schedules · ced705c4
  David Penry authored Jun 30, 2022
  ced705c4
- [InstCombine] Change order of canonicalization of ADD and AND · f82c55fa
  Jay Foad authored Jul 18, 2022
  f82c55fa
- [InstCombine] Try not to demand low order bits for Add · 2754ff88
  Jay Foad authored Jul 18, 2022
  2754ff88
- [TTI] Use OperandValueInfo in getMemoryOpCost client api [nfc] · 27d3321c
  Philip Reames authored Aug 22, 2022
  27d3321c
- [TTI] Remove OperandValueKind/Properties from getArithmeticInstrCost interface [nfc] · 274f86e7
  Philip Reames authored Aug 22, 2022
  274f86e7
- [LiveDebugValues] Fix a warning · 36ec4dec
  Kazu Hirata authored Aug 22, 2022
  36ec4dec
- [TTI] Migrate getOperandInfo to OperandVaueInfo [nfc] · c42a5f1c
  Philip Reames authored Aug 22, 2022
  c42a5f1c
- [DebugInfo][NFC] Represent DbgValues with multiple ops in IRefLDV · b5ba5d2a
  Stephen Tozer authored Jun 17, 2022
  b5ba5d2a
- [TTI] Start process of merging OperandValueKind and OperandValueProperties [nfc] · 5cd42710
  Philip Reames authored Aug 22, 2022
  5cd42710
- RegisterClassInfo: Fix CSR cache invalidation · b2542c40
  Matthias Braun authored Aug 17, 2022
  b2542c40
- [DebugInfo][NFC] Update LDV to use generic DBG_VALUE* MI interface · 11ce014a
  Stephen Tozer authored Jun 16, 2022
  11ce014a
- [DebugInfo] Handle joins PHI+Def values in InstrRef LiveDebugValues · 53125e7d
  Stephen Tozer authored May 17, 2022
  53125e7d
- [AArch64] Add SK_Splice fixed-width costs · 0cf9e47f
  David Green authored Aug 22, 2022
  0cf9e47f
- [CostModel][X86] getShuffleCost - treat SK_Splice as SK_PermuteTwoSrc · dd5b4897
  Simon Pilgrim authored Aug 22, 2022
  dd5b4897
- [ARM] Fix bug in also_compatible_with attribute parser · 1d66c5eb
  Victor Campos authored Aug 19, 2022
  1d66c5eb
- [SCEV] Prove condition invariance via context, try 2 · e587199a
  Max Kazantsev authored Aug 22, 2022
  e587199a
- [RISCV] Add zihintntl instructions · 7167a420
  Shao-Ce SUN authored Aug 22, 2022
  7167a420
- [LoongArch] Support Load and Store with 14-bit signed immediate operands · 2492bdb2
  gonglingqin authored Aug 22, 2022
  2492bdb2
- [PowerPC][Coroutines] Add tail-call check with call information for coroutines · d2d77e05
  Ting Wang authored Aug 21, 2022
  d2d77e05
- [AArch64][NFC] Replace setOperationAction and AddPromotedToType · 53bc7d5f
  wanglian authored Aug 19, 2022
  53bc7d5f
Aug 21, 2022
- [RISCV] Remove impossible TODO in RISCVRedundantCopyElimination. NFC · abce7ace
  Craig Topper authored Aug 21, 2022
  abce7ace
- [RISCV] Optimize x <s -1 ? x : -1. Improve x >u 1 ? x : 1. · 1a042dd6
  Craig Topper authored Aug 21, 2022
  1a042dd6
- [RISCV] Be more strict about LUI+ADDI macrofusion pre-RA. · a6c3ccd4
  Craig Topper authored Aug 21, 2022
  a6c3ccd4
- [CostModel][X86] Add CodeSize handling for fadd/fsub/fmul/fsqrt ops · 7ff2a9f2
  Simon Pilgrim authored Aug 21, 2022
  7ff2a9f2
- Revert rG15de7aaae52ef4be9f9ff3b130804e5b5ccd29f4 "[CostModel][X86] Add... · 3c4391b4
  Simon Pilgrim authored Aug 21, 2022
  3c4391b4
- [CostModel][X86] Add CodeSize/SizeLatency handling for fadd/fsub/fmul/fsqrt ops · 15de7aaa
  Simon Pilgrim authored Aug 21, 2022
  15de7aaa
- [InstCombine] reassociate bitwise logic chains based on uses · 15e3d869
  Sanjay Patel authored Aug 21, 2022
  15e3d869