- Jun 10, 2016
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Roger Ferrer Ibanez authored
llvm-svn: 272380
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Xinliang David Li authored
End-end test with no integrated assembly should be added at some point (not done now because some bots are not properly configured to support -no-integrated-as) llvm-svn: 272376
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Dan Liew authored
This fixes the following unit tests: FuzzerDictionary.ParseOneDictionaryEntry FuzzerDictionary.ParseDictionaryFile The issue appears to be mixing non-ASan-ified code (LibFuzzer) and ASan-ified code (the unittest) as the tests would pass fine if everything was built with ASan enabled. I believe the issue is that different implementations of std::vector<> are being used in LibFuzzer and outside LibFuzzer (in the unittests). For Libcxx (I've not seen the issue manifest for libstdc++) we can disable the ASanified std::vector<> by definining the ``_LIBCPP_HAS_NO_ASAN`` macro. Doing this fixes the tests on OSX. Differential Revision: http://reviews.llvm.org/D21049 llvm-svn: 272374
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Craig Topper authored
llvm-svn: 272371
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Zachary Turner authored
This is the next step towards being able to write PDBs. MemoryBuffer is immutable, and StreamInterface is our replacement which can be any combination of read-only, read-write, or write-only depending on the particular implementation. The one place where we were creating a PDBFile (in RawSession) is updated to subclass ByteStream with a simple adapter that holds a MemoryBuffer, and initializes the superclass with the buffer's array, so that all the functionality of ByteStream works transparently. llvm-svn: 272370
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Zachary Turner authored
This adds method and tests for writing to a PDB stream. With this, even a PDB stream which is discontiguous can be treated as a sequential stream of bytes for the purposes of writing. Reviewed By: ruiu Differential Revision: http://reviews.llvm.org/D21157 llvm-svn: 272369
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Craig Topper authored
[AVX512] Fix shuffle comment printing to handle the masked versions of some shuffles. Previously we were printing the mask operands as the register names. llvm-svn: 272367
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Matt Arsenault authored
llvm-svn: 272364
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Qin Zhao authored
Summary: Adds the struct field offset array in struct StructInfo. Updates test struct_field_count_basic.ll. Reviewers: aizatsky Subscribers: llvm-commits, bruening, eugenis, kcc, zhaoqin, vitalybuka Differential Revision: http://reviews.llvm.org/D21192 llvm-svn: 272362
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Richard Trieu authored
llvm-svn: 272359
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Qin Zhao authored
Summary: Adds ClInstrumentFastpath option to control fastpath instrumentation. Avoids the load/store instrumentation for the cache fragmentation tool. Renames cache_frag_basic.ll to working_set_slow.ll for slowpath instrumentation test. Adds the __esan_init check in struct_field_count_basic.ll. Reviewers: aizatsky Subscribers: llvm-commits, bruening, eugenis, kcc, zhaoqin, vitalybuka Differential Revision: http://reviews.llvm.org/D21079 llvm-svn: 272355
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Matt Arsenault authored
Fixes verifier errors after SIShrinkInstructions. llvm-svn: 272351
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Tom Stellard authored
Summary: This fixes a bug with ds_*permute instructions where if it was passed a constant address, then the offset operand would get assigned a register operand instead of an immediate. Reviewers: scchan, arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19994 llvm-svn: 272349
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Tom Stellard authored
Reviewers: arsenm, axeldavy Subscribers: MatzeB, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D19823 llvm-svn: 272346
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Matt Arsenault authored
The flat atomics could already be selected, but only when using flat instructions for global memory. Add patterns for flat addresses. llvm-svn: 272345
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Matt Arsenault authored
This was using extract_subreg sub0 to extract the low register of the result instead of sub0_sub1, producing an invalid copy. There doesn't seem to be a way to use the compound subreg indices in tablegen since those are generated, so manually select it. llvm-svn: 272344
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Vitaly Buka authored
Summary: We failed to unpoison uninteresting allocas on return as unpoisoning is part of main instrumentation which skips such allocas. Added check -asan-instrument-allocas for dynamic allocas. If instrumentation of dynamic allocas is disabled it will not will not be unpoisoned. PR27453 Reviewers: kcc, eugenis Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21207 llvm-svn: 272341
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Matt Arsenault authored
No tests break with this enabled. llvm-svn: 272340
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Eric Christopher authored
Update a test as we're now going to emit it for easier reading of generated assembly as well. llvm-svn: 272339
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Matt Arsenault authored
llvm-svn: 272338
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Matt Arsenault authored
I'm still not sure under what circumstances the offset here is non-0, but private memory is not limited to 27-bits. llvm-svn: 272337
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Matt Arsenault authored
llvm-svn: 272336
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George Burgess IV authored
Prior to this patch, we used argument/global stratified attributes in order to note that a value could have come from either dereferencing a global/arg, or from the assignment from a global/arg. Now, AttrUnknown is placed on sets when we see a dereference, instead of the global/arg attributes. This allows us to be more aggressive in the future when we see global/arg attributes without AttrUnknown. Patch by Jia Chen. Differential Revision: http://reviews.llvm.org/D21110 llvm-svn: 272335
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Vitaly Buka authored
Summary: We still want to unpoison full stack even in use-after-return as it can be disabled at runtime. PR27453 Reviewers: eugenis, kcc Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21202 llvm-svn: 272334
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Alina Sbirlea authored
[cpu-detection] [amdfam10] Return barcelona, and amdfam10 for all other subtypes. Address Bug 28067. Along with the refactoring of Host.cpp, getHostCPUName() was modified to return more precise types for CPUs in amdfam10. However, callers of getHostCPUName() do string matching on type, so this cannot be modified. Currently there is support in the x86 backend for barcelona. For all other subtypes the assumed return value is amdfam10. Fix: getHostCPUName() returns barcelona subtype and amdfam10 for all others. This can be extended further when support for the other subtypes is added. Differential revision: http://reviews.llvm.org/D21193 llvm-svn: 272333
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Alina Sbirlea authored
llvm-svn: 272332
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Alina Sbirlea authored
llvm-svn: 272329
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Alina Sbirlea authored
Summary: Remove architecture subtype from the string returned by getHostCPUName(). String matching done on type. Reviewers: llvm-commits, echristo Subscribers: mehdi_amini Differential Revision: http://reviews.llvm.org/D21193 llvm-svn: 272328
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Easwaran Raman authored
Instead of directly using MaxFunctionCount and function entry count to determine callee hotness, use the isHotFunction/isColdFunction methods provided by ProfileSummaryInfo. Differential revision: http://reviews.llvm.org/D21045 llvm-svn: 272321
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Simon Pilgrim authored
llvm-svn: 272319
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- Jun 09, 2016
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Quentin Colombet authored
When we delete a live-range, we check if that live-range is the origin of others to keep it around for rematerialization. For that we check that the instruction we are about to remove is the same as the definition of the VNI of the original live-range. If this is the case, we just shrink the live-range to an empty one. Now, when we try to delete one of the children of such live-range (product of splitting), we do the same check. However, now the original live-range is empty and there is no way we can access the VNI to check its definition, and we crash. When we cannot get the VNI for the original live-range, that means we are not in the presence of the original definition. Thus, this check does not need to happen in that case and the crash is sloved! This bug was introduced in r266162 | wmi | 2016-04-12 20:08:27. It affects every target that uses the greedy register allocator. To happen, we need to delete both a the original instruction and its split products, in that order. This is likely to happen when rematerialization comes into play. Trying to produce a more robust test case. Will follow in a coming commit. This fixes llvm.org/PR27983. rdar://problem/26651519 llvm-svn: 272314
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Simon Pilgrim authored
Auto-upgrade to generic shuffles like sse/avx2 implementations now that we can lower to VPSLLDQ/VPSRLDQ llvm-svn: 272308
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Simon Pilgrim authored
llvm-svn: 272307
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Duncan P. N. Exon Smith authored
r267296 used std::piecewise_construct without using std::forward_as_tuple, and r267298 hacked it out (using an emplace_back followed by a couple of reset() calls) because of a problem on a bot. I'm finally circling back to call forward_as_tuple as I should have to begin with (thanks to David Blaikie for pointing out the missing piece). Note that this code uses emplace_back() instead of push_back(make_pair()) because the move constructor for TrackingMDRef is expensive (cheaper than a copy, but still expensive). llvm-svn: 272306
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Simon Pilgrim authored
512-bit VPSLLDQ/VPSRLDQ can only be used for avx512bw targets so lowerVectorShuffleAsShift had to be adjusted to include the subtarget llvm-svn: 272300
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Justin Lebar authored
Summary: Currently clang emits these instructions via inline (volatile) asm in the CUDA headers. Switching to intrinsics will let the optimizer reason across calls to these intrinsics. Reviewers: tra Subscribers: llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D21160 llvm-svn: 272298
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Easwaran Raman authored
Differential Revision: http://reviews.llvm.org/D21090 llvm-svn: 272294
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Wei Ding authored
We were using the fast fdiv lowering for all division, implementation of IEEE754 fdiv is added. http://reviews.llvm.org/D20557 llvm-svn: 272292
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Michael Kuperstein authored
Previously, we materialized secondary vector IVs from the primary scalar IV, by offseting the primary to match the correct start value, and then broadcasting it - inside the loop body. Instead, we can use a real vector IV, like we do for the primary. This enables using vector IVs for secondary integer IVs whose type matches the type of the primary. Differential Revision: http://reviews.llvm.org/D20932 llvm-svn: 272283
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Jan Vesely authored
Fixes {u,}long_{min,max,clamp} opencl piglit regressions on EG. Reviewers: arsenm Differential Revision: http://reviews.llvm.org/D17898 llvm-svn: 272272
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