Commits · 894ddba1c9ed6e1eef940e7ef4cb7df8482339a4 · Lorenzo Albano / LLVM bpEVL · GitLab

Oct 27, 2021
- Revert "[ARM] __cxa_end_cleanup should be called instead of _UnwindResume." · 894ddba1
  Daniel Kiss authored Oct 27, 2021
  894ddba1
- [x86] enhance mayFoldLoad to check alignment · 6c0a2c28
  Sanjay Patel authored Oct 27, 2021
  6c0a2c28
- [AArch64][SVE] Combine predicated FMUL/FADD into FMA · fc28a2f8
  Matt authored Oct 12, 2021
  fc28a2f8
- [AArch64] Add support for the 'R' architecture profile. · 8689f5e6
  Alexandros Lamprineas authored Sep 20, 2021
  8689f5e6
- [ARM] __cxa_end_cleanup should be called instead of _UnwindResume. · da1d1a08
  Daniel Kiss authored Oct 27, 2021
  da1d1a08
- [Hexagon] Remove set-but-unused variables (NFC) · 6af3e87d
  Kazu Hirata authored Oct 26, 2021
  
  6af3e87d
- [X86][NFC] Add the missed `break;` for 79f9dfef · eb55c1f1
  Phoebe Wang authored Oct 27, 2021
  
  eb55c1f1
- [RISCV] Add ICmp and FCmp to shouldSinkOperands. · 2783a5cf
  Craig Topper authored Oct 26, 2021
  
  2783a5cf
- [RISCV] Optimize immediate materialisation with SLLI.UW in the Zba extension · 97e52e1c
  Ben Shi authored Oct 17, 2021
  97e52e1c
- [AMDGPU] Use max waves for scheduler's initial occupancy target · 02e60f2e
  Austin Kerbow authored Oct 22, 2021
  02e60f2e
Oct 26, 2021
- [ARC] Fix `undefined symbol: llvm::MachineFunction::dump() const` · 226465ef
  Fangrui Song authored Oct 26, 2021
  
  226465ef
- [CodeGen, Hexagon] Use MachineBasicBlock::phis (NFC) · c3e698e2
  Kazu Hirata authored Oct 26, 2021
  
  c3e698e2
- [SystemZ] Improvement of emitMemMemWrapper() · bb506938
  Jonas Paulsson authored Oct 19, 2021
  bb506938
- [AMDGPU] Remove unused CSR defs · eb16570a
  Neubauer, Sebastian authored Oct 26, 2021
  eb16570a
- [AMDGPU] Add constrained shift pattern matches. · 61e3b9fe
  Abinav Puthan Purayil authored Sep 22, 2021
  61e3b9fe
- [PowerPC] use right extend type for SCEV · 631f44f3
  Chen Zheng authored Oct 26, 2021
  631f44f3
- [AMDGPU] Enable 48-bit mul in AMDGPUCodeGenPrepare. · 781dd39b
  Abinav Puthan Purayil authored Oct 23, 2021
  781dd39b
- [AMDGPU] Implement llvm.amdgcn.mulhi.[i,u]24 intrinsics. · 9bd5cfeb
  Abinav Puthan Purayil authored Oct 23, 2021
  9bd5cfeb
- [x86] use cast instead of dyn_cast for unchecked usage; NFC · 2ab0148c
  Sanjay Patel authored Oct 26, 2021
  2ab0148c
- [AMDGPU] Fix setcc combine for i128 · 487f1560
  Neubauer, Sebastian authored Oct 25, 2021
  487f1560
- [AMDGPU] Use standard MachineBasicBlock::getFallThrough method. NFCI. · c8e5aef1
  Jay Foad authored May 04, 2021
  c8e5aef1
- [SystemZ] Provide size values for PATCHPOINT, STACKMAP and FENTRY_CALL. · 9f887277
  Jonas Paulsson authored Oct 25, 2021
  9f887277
- [X86] Move splat addends from the gather/scatter index operand to the base address · 79f9dfef
  Phoebe Wang authored Oct 26, 2021
  79f9dfef
- [PPC][LLVM] Inclusive terms: remove references to sanity check in lib/Target/PowerPC · e9163660
  Zarko Todorovski authored Oct 25, 2021
  e9163660
Oct 25, 2021
- [WebAssembly] support Memory64 in target_features section · 5694dbcc
  Wouter van Oortmerssen authored Oct 21, 2021
  5694dbcc
- [RISCV] Reduce the number of RISCV vector builtins by an order of magnitude. · e2b7aabb
  Craig Topper authored Oct 25, 2021
  e2b7aabb
- [RISCV] Add vcsr CSR name for V extension. · 210b586a
  Craig Topper authored Oct 25, 2021
  210b586a
- [AArch64] Handle ST1iN instructions in isAArch64FrameOffsetLegal · 2d9ee590
  Danila Malyutin authored Oct 22, 2021
  2d9ee590
- [SVE][CodeGen] Enable reciprocal estimates for scalable fdiv/fsqrt · 1f49b71f
  Kerry McLaughlin authored Oct 25, 2021
  1f49b71f
- [AArch64] Remove redundant ORRWrs which is generated by zero-extend · a5024362
  Jingu Kang authored Sep 30, 2021
  a5024362
- [PowerPC] common chains to reuse offsets to reduce register pressure. · 80e6aff6
  Chen Zheng authored Oct 25, 2021
  80e6aff6
- [Target, Transforms] Use predecessors instead of pred_begin and pred_end (NFC) · 98007313
  Kazu Hirata authored Oct 24, 2021
  
  98007313
- Use llvm::any_of and llvm::none_of (NFC) · 4bd46501
  Kazu Hirata authored Oct 24, 2021
  
  4bd46501
- X86InstrInfo: Look across basic blocks in optimizeCompareInstr · 4b75d674
  Matthias Braun authored Sep 24, 2021
  4b75d674
- X86InstrInfo: Refactor and cleanup optimizeCompareInstr · 683994c8
  Matthias Braun authored Sep 24, 2021
  683994c8
Oct 24, 2021
- [ARC] Fix -Wunused-variable. NFC · 54405a49
  Fangrui Song authored Oct 24, 2021
  
  54405a49
Oct 23, 2021
- [X86] findEltLoadSrc - fix shift amount variable name. NFCI. · b09f2ee5
  Simon Pilgrim authored Oct 23, 2021
  b09f2ee5
- Ensure newlines at the end of files (NFC) · d8e4170b
  Kazu Hirata authored Oct 23, 2021
  
  d8e4170b
- [X86] Don't add implicit REP prefix to VIA PadLock xstore · 2d8c18fb
  Jessica Clarke authored Oct 23, 2021
  2d8c18fb
Oct 22, 2021
- AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size · ec57b375
  Matt Arsenault authored Sep 09, 2021
  ec57b375