- Nov 14, 2012
-
-
Craig Topper authored
llvm-svn: 167913
-
Rafael Espindola authored
llvm-svn: 167912
-
Anton Korobeynikov authored
Do some cleanup of the code while here. Inspired by patch by Logan Chien! llvm-svn: 167904
-
Eric Christopher authored
temporarily as it is breaking the gdb bots. This reverts commit r167806/e7ff4c14b157746b3e0228d2dce9f70712d1c126. llvm-svn: 167886
-
- Nov 13, 2012
-
-
Andrew Trick authored
llvm-svn: 167880
-
Andrew Trick authored
This option will eventually either be enabled unconditionally or replaced by a more general live range splitting optimization. llvm-svn: 167879
-
Michael J. Spencer authored
llvm-svn: 167877
-
Ulrich Weigand authored
physical register as candidate for common subexpression elimination in MachineCSE. This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc caused by MachineCSE invalidly merging two separate DYNALLOC insns. llvm-svn: 167855
-
Andrew Trick authored
Working on reducing unit tests. This won't be enabled unless a subtarget enables misched. llvm-svn: 167851
-
Duncan Sands authored
llvm-svn: 167830
-
Andrew Trick authored
This allows me to begin enabling (or backing out) misched by default for one subtarget at a time. To run misched we typically want to: - Disable SelectionDAG scheduling (use the source order scheduler) - Enable more aggressive coalescing (until we decide to always run the coalescer this way) - Enable MachineScheduler pass itself. Disabling PostRA sched may follow for some subtargets. llvm-svn: 167826
-
Andrew Trick authored
This adds the -join-globalcopies option which can be enabled by default once misched is also enabled. Ideally, the register coalescer would be able to split local live ranges in a way that produces copies that can be easily resolved by the scheduler. Until then, this heuristic should be good enough to at least allow the scheduler to run after coalescing. llvm-svn: 167825
-
Andrew Trick authored
For now be more conservative in case other out-of-tree schedulers rely on the old behavior of artificial edges. llvm-svn: 167808
-
Bill Wendling authored
If we have a type 'int a[1]' and a type 'int b[0]', the generated DWARF is the same for both of them because we use the 'upper_bound' attribute. Instead use the 'count' attrbute, which gives the correct number of elements in the array. <rdar://problem/12566646> llvm-svn: 167806
-
Andrew Trick authored
Block priorities still apply outside loops. llvm-svn: 167793
-
Andrew Trick authored
llvm-svn: 167785
-
- Nov 12, 2012
-
-
Eric Christopher authored
llvm-svn: 167765
-
Andrew Trick authored
This teaches the register coalescer to be less prone to split critical edges. I am currently benchmarking this with the new (post-coalescer) scheduler. I plan to enable this by default and remove the option as soon as misched is enabled. llvm-svn: 167758
-
Andrew Trick authored
llvm-svn: 167753
-
Andrew Trick authored
Uses the infrastructure from r167742 to support clustering instructure that the target processor can "fuse". e.g. cmp+jmp. Next step: target hook implementations with test cases, and enable. llvm-svn: 167744
-
Andrew Trick authored
This infrastructure is generally useful for any target that wants to strongly prefer two instructions to be adjacent after scheduling. A following checkin will add target-specific hooks with unit tests. Then this feature will be enabled by default with misched. llvm-svn: 167742
-
Andrew Trick authored
This adds support for weak DAG edges to the general scheduling infrastructure in preparation for MachineScheduler support for heuristics based on weak edges. llvm-svn: 167738
-
- Nov 09, 2012
-
-
Jakob Stoklund Olesen authored
The RegMaskSlots contains 'r' slots while NewIdx and OldIdx are 'B' slots. This broke the checks in the assertions. This fixes PR14302. llvm-svn: 167625
-
Benjamin Kramer authored
llvm-svn: 167618
-
- Nov 07, 2012
-
-
Andrew Trick authored
misched is disabled by default. With -enable-misched, these heuristics balance the schedule to simultaneously avoid saturating processor resources, expose ILP, and minimize register pressure. I've been analyzing the performance of these heuristics on everything in the llvm test suite in addition to a few other benchmarks. I would like each heuristic check to be verified by a unit test, but I'm still trying to figure out the best way to do that. The heuristics are still in considerable flux, but as they are refined we should be rigorous about unit testing the improvements. llvm-svn: 167527
-
Andrew Trick authored
instructions without relying on liveintervals. llvm-svn: 167526
-
Bill Wendling authored
llvm-svn: 167525
-
Bill Wendling authored
updating an abstract DIE or not. If we are, then we use that. Its children will be added on later, as well as the object pointer attribute. Otherwise, this function may be called with a concrete DIE twice and adding the children and object pointer attribute to it twice. <rdar://problem/12401423&12600340> llvm-svn: 167524
-
- Nov 06, 2012
-
-
Chad Rosier authored
register masks. This is an obvious and necessary fix for a soon to be committed patch. No test case possible at this time. Reviewed by Jakob. llvm-svn: 167498
-
Andrew Trick authored
Expose the processor resources defined by the machine model to the scheduler and other clients through the TargetSchedule interface. Normalize each resource count with respect to other kinds of resources. This allows scheduling heuristics to balance resources against other kinds of resources and latency. llvm-svn: 167444
-
Andrew Trick authored
llvm-svn: 167443
-
Andrew Trick authored
This is in preparation for adding "weak" DAG edges, but generally simplifies the design. llvm-svn: 167435
-
- Nov 03, 2012
-
-
Owen Anderson authored
Be careful not to optimize a SELECT_CC into a SETCC post-legalization if the SETCC node would be illegal. llvm-svn: 167344
-
- Nov 02, 2012
-
-
Manman Ren authored
InputArg in r165616. This will enable us to get the actual type for both InputArg and OutputArg. rdar://9932559 llvm-svn: 167265
-
- Nov 01, 2012
-
-
Chandler Carruth authored
r165941: Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis. Despite this commit log, this change primarily changed stuff outside of VMCore, and those changes do not carry any tests for correctness (or even plausibility), and we have consistently found questionable or flat out incorrect cases in these changes. Most of them are probably correct, but we need to devise a system that makes it more clear when we have handled the address space concerns correctly, and ideally each pass that gets updated would receive an accompanying test case that exercises that pass specificaly w.r.t. alternate address spaces. However, from this commit, I have retained the new C API entry points. Those were an orthogonal change that probably should have been split apart, but they seem entirely good. In several places the changes were very obvious cleanups with no actual multiple address space code added; these I have not reverted when I spotted them. In a few other places there were merge conflicts due to a cleaner solution being implemented later, often not using address spaces at all. In those cases, I've preserved the new code which isn't address space dependent. This is part of my ongoing effort to clean out the partial address space code which carries high risk and low test coverage, and not likely to be finished before the 3.2 release looms closer. Duncan and I would both like to see the above issues addressed before we return to these changes. llvm-svn: 167222
-
Chandler Carruth authored
getIntPtrType support for multiple address spaces via a pointer type, and also introduced a crasher bug in the constant folder reported in PR14233. These commits also contained several problems that should really be addressed before they are re-committed. I have avoided reverting various cleanups to the DataLayout APIs that are reasonable to have moving forward in order to reduce the amount of churn, and minimize the number of commits that were reverted. I've also manually updated merge conflicts and manually arranged for the getIntPtrType function to stay in DataLayout and to be defined in a plausible way after this revert. Thanks to Duncan for working through this exact strategy with me, and Nick Lewycky for tracking down the really annoying crasher this triggered. (Test case to follow in its own commit.) After discussing with Duncan extensively, and based on a note from Micah, I'm going to continue to back out some more of the more problematic patches in this series in order to ensure we go into the LLVM 3.2 branch with a reasonable story here. I'll send a note to llvmdev explaining what's going on and why. Summary of reverted revisions: r166634: Fix a compiler warning with an unused variable. r166607: Add some cleanup to the DataLayout changes requested by Chandler. r166596: Revert "Back out r166591, not sure why this made it through since I cancelled the command. Bleh, sorry about this! r166591: Delete a directory that wasn't supposed to be checked in yet. r166578: Add in support for getIntPtrType to get the pointer type based on the address space. llvm-svn: 167221
-
Owen Anderson authored
llvm-svn: 167200
-
Jakob Stoklund Olesen authored
The static compose() function in RegisterCoalescer was doing the exact same thing. llvm-svn: 167198
-
- Oct 31, 2012
-
-
Benjamin Kramer authored
No functionality change. llvm-svn: 167116
-
Akira Hatanaka authored
type MachineInstr* and MachineBasicBlock::iterator. llvm-svn: 167088
-