Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.

The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.

llvm-svn: 74518

llvm-svn: 74087

Fix support for inline asm input / output operand tying when operand spans across multiple registers (e.g. two i64 operands in 32-bit mode).

llvm-svn: 74053

llvm-svn: 72948

-Replace DebugLocTuple's Source ID with CompileUnit's GlobalVariable*
-Remove DwarfWriter::getOrCreateSourceID
-Make necessary changes for the above (fix callsites, etc.)

llvm-svn: 70520

llvm-svn: 70408

variadic operands correctly. Patch by Jakob Stoklund Olesen!

llvm-svn: 69190

code out of line.

llvm-svn: 69124

isRegTiedToDefOperand.  Thanks to Bob for pointing this out!

llvm-svn: 68734

register destinations that are tied to source operands.  The
TargetInstrDescr::findTiedToSrcOperand method silently fails for inline
assembly.  The existing MachineInstr::isRegReDefinedByTwoAddr was very
close to doing what is needed, so this revision makes a few changes to
that method and also renames it to isRegTiedToUseOperand (for consistency
with the very similar isRegTiedToDefOperand and because it handles both
two-address instructions and inline assembly with tied registers).

llvm-svn: 68714

attached testcase.

llvm-svn: 68712

Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.

llvm-svn: 67512

llvm-svn: 67335

llvm-svn: 65067

llvm-svn: 63152

several places. isTerminator() returns true for a superset
of cases, and includes things like FP_REG_KILL, which are
nither return or branch but aren't safe to move/remat/etc.

llvm-svn: 61373

llvm-svn: 61213

llvm-svn: 60804

llvm-svn: 60586

llvm-svn: 59542

llvm-svn: 59540

llvm-svn: 57339

isReg, etc., from isRegister, etc.

llvm-svn: 57006

volatile memory references are safe to move.

llvm-svn: 56948

RA problem by expanding the live interval of an
earlyclobber def back one slot.  Remove
overlap-earlyclobber throughout.  Remove 
earlyclobber bits and their handling from
live internals.

llvm-svn: 56539

any volatile memory references.

llvm-svn: 56528

with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.

llvm-svn: 56290

llvm-svn: 56194

isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.

llvm-svn: 56189

representation; coalescer and RA need to know
about it.  No functional change.

llvm-svn: 56161

when searching for redundant subregister dead/kill bits.

Previously it was common to see instructions marked like this:
  "RET %EAX<imp-use,kill>, %AX<imp-use,kill>"

With this change, addRegisterKilled continues scanning after
finding the %EAX operand, so it proceeds to discover the
redundant %AX kill and eliminates it, producing this:
  "RET %EAX<imp-use,kill>"

This currently has no effect on the generated code.

llvm-svn: 55698

llvm-svn: 55563

llvm-svn: 55434

llvm-svn: 55430

simplify PseudoSourceValue printing a bit.  Unnest all of PseudoSourceValue.cpp from the llvm namespace.

llvm-svn: 55293

llvm-svn: 55291

alignment and volatility information, such as loads and
stores, to reduce the number of integer values added to
the FoldingSetNodeID.

llvm-svn: 55058

llvm-svn: 54807

subregister query, and by increasing the size of the subregister hashtable so
that there are fewer collisions.

llvm-svn: 54781

a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.

Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.

Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.

llvm-svn: 54146