rdar://problem/8893967: JM/lencod miscompile at -arch armv7 -mthumb -O3

Added ResurrectKill to remove kill flags after we decide to reused a
physical register. And (hopefully) ensure that we call it in all the
right places.

Sorry, I'm not checking in a unit test given that it's a miscompile I
can't reproduce easily with a toy example. Failures in the rewriter
depend on a series of heuristic decisions maked during one of the many
upstream phases in codegen. This case would require coercing regalloc
to generate a couple of rematerialzations in a way that causes the
scavenger to reuse the same register at just the wrong point.

The general way to test this is to implement kill flags
verification. Then we could have a simple, robust compile-only unit
test. That would be worth doing if the whole pass was not about to
disappear. At this point we focus verification work on the next
generation of regalloc.

llvm-svn: 124442

It was leaving dangling pointers in the slot index maps.

llvm-svn: 123334

llvm-svn: 123333

Instead encode llvm IR level property "HasSideEffects" in an operand (shared
with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check
the operand when the instruction is an INLINEASM.

This allows memory instructions to be moved around INLINEASM instructions.

llvm-svn: 123044

llvm-svn: 123031

llvm-svn: 118342

LocalRewriter.

This is a bit of a hack that adds an implicit use operand to model the
read-modify-write nature of a partial redef. Uses and defs are rewritten in
separate passes, and a single operand would never be processed twice.

<rdar://problem/8518892>

llvm-svn: 116210

it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.

llvm-svn: 116190

are still way too long, but it's a start.

No functional change intended.

llvm-svn: 116116

LiveIntervals already adds <imp-def> operands for super-registers when a subreg
def defines the whole register. Thus, it is not necessary to do it again when
rewriting.

In fact, the super-register imp-defs caused miscompilations because the late
scheduler couldn't see that the super-register was read.

We still add super-reg <imp-use,kill> operands when rewriting virtuals to
physicals.

llvm-svn: 113299

slot.

Teach it to also check for early clobbered aliases, and early clobber operands
following the current operand.

This fixes the miscompilation in PR8044 where EC registers eax and ecx were
being used for inputs.

llvm-svn: 112988

we sometimes compare singular iterators, reported by ENABLE_EXPENSIVE_CHECKS.
This fixes PR7825.

llvm-svn: 110355

llvm-svn: 109513

llvm-svn: 109511

llvm-svn: 108556

getMinimalPhysRegClass. It was used to produce spills, and it is better to
use the most specific class if possible.

Update getLoadStoreRegOpcode to handle GR32_AD.

llvm-svn: 108115

The first one was used just to call isSafeToMoveRegClassDefs. In
general, using a more specific reg class is better, in practice only
x86 implements that method and the results are always the same.

The second one is in FindFreeRegister and is used to check if a register
is in a register class, a much more direct call to contains is better as
it should cover more cases and is faster.

llvm-svn: 108093

llvm-svn: 108062

inserted in a MBB, and return an already inserted MI.

This target API change is necessary to allow foldMemoryOperand to call
storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot
reference in a target independent way.

The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait
until COPY folding is actually implemented. Most targets only fold copies and
won't need to specialize this hook at all.

llvm-svn: 107991

llvm-svn: 107949

EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.

Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.

llvm-svn: 107879

llvm-svn: 106865

is reused as an input.  PR 4118.  Testcase is too big,
as usual with bugs in this area, but there's one in
the PR.

llvm-svn: 106816

instruction defines subregisters.

Any existing subreg indices on the original instruction are preserved or
composed with the new subreg index.

Also substitute multiple operands mentioning the original register by using the
new MachineInstr::substituteRegister() function. This is necessary because there
will soon be <imp-def> operands added to non read-modify-write partial
definitions. This instruction:

  %reg1234:foo = FLAP %reg1234<imp-def>

will reMaterialize(%reg3333, bar) like this:

  %reg3333:bar-foo = FLAP %reg333:bar<imp-def>

Finally, replace the TargetRegisterInfo pointer argument with a reference to
indicate that it cannot be NULL.

llvm-svn: 105358

definitions of the virtual register.

This happens when spilling the registers produced by REG_SEQUENCE:

%reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0

The rewriter would spill the register multiple times, dead store elimination
tried to keep up, but ended up cutting the branch it was sitting on.

llvm-svn: 104321

llvm-svn: 103450

doesn't have to guess.

llvm-svn: 103194

llvm-svn: 103193

llvm-svn: 102654

solution.  The only reason these don't fire with gcc-4.2 is that gcc turns off
part of -Wsign-compare in C++ on accident.

llvm-svn: 100581

llvm-svn: 100532

llvm-svn: 99879

llvm-svn: 99637

llvm-svn: 98295

Move methods out of line and M-x whitespace-cleanup.
Promote common method arguments to member variables.

llvm-svn: 98207

Russell Wallace.

llvm-svn: 96580

When coalescing with a physreg, remember to add imp-def and imp-kill when
dealing with sub-registers.

Also fix a related bug in VirtRegRewriter where substitutePhysReg may
reallocate the operand list on an instruction and invalidate the reg_iterator.
This can happen when a register is mentioned twice on the same instruction.

llvm-svn: 96072

llvm-svn: 95748

llvm-svn: 95745

into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687