Make BinOps typed and require a type specifier for !nameconcat.  This
allows binops to be used in typed contexts such as when passing
arguments to classes.

llvm-svn: 69921

Allow defm to inherit from multiple multiclasses.

llvm-svn: 69832

Implement !nameconcat to concatenate strings and look up the resulting
name in the symbol table, returning an object.

llvm-svn: 69822

llvm-svn: 69810

non-zero exit status, so nm will already have printed some error
messages.'

Patch by Jay Foad!

llvm-svn: 69677

llvm-svn: 69630

Fixes segfaults in some corner cases.

llvm-svn: 69494

for ARM.  Patch by Sandeep Patel.

llvm-svn: 69371

and argument positions but only to the overloaded intrinsic parameters.
Keep a separate list of these overloaded parameters in CodeGenTarget.cpp
so they can be resolved easily.  Remove assertions from IntrinsicEmitter.cpp:
they were harmless but confusing, and the assertions elsewhere in TableGen
will catch any incorrect values.

llvm-svn: 69316

llvm-svn: 69270

llvm-svn: 69257

llvm-svn: 69249

llvm-svn: 69235

llvm-svn: 69219

llvm-svn: 69213

llvm-svn: 69212

llvm-svn: 69208

in the record.

llvm-svn: 69176

llvm-svn: 69173

llvm-svn: 69152

it accordingly. Thanks to Jakob Stoklund Olesen for pointing
out how this might be useful.

llvm-svn: 68986

This will be used to replace things like X86's MOV32to32_.

Enhance ScheduleDAGSDNodesEmit to be more flexible and robust
in the presense of subregister superclasses and subclasses. It
can now cope with the definition of a virtual register being in
a subclass of a use.

Re-introduce the code for recording register superreg classes and
subreg classes. This is needed because when subreg extracts and
inserts get coalesced away, the virtual registers are left in
the correct subclass.

llvm-svn: 68961

in multiple classes in the case that the classes are all
in subset/superset relations. This function is used by the
fast-isel emitter, which always wants the super-most set.

llvm-svn: 68957

llvm-svn: 68807

llvm-svn: 68795

llvm-svn: 68730

Convert TargetRegisterInfo's super-register checking to use a pre-computed hash table just like subregister checking does.

llvm-svn: 68669

This makes debugging register classes a bit easier."

Patch by Jakob Stoklund Olesen!

llvm-svn: 68400

Note that these are distinct from TargetInstrInfo::INSERT_SUBREG
and TargetInstrInfo::EXTRACT_SUBREG, which are used.

llvm-svn: 68355

llvm-svn: 68222

llvm-svn: 68112

llvm-svn: 68111

valid argument attributes (zeroext and signext are).

llvm-svn: 68053

llvm-svn: 67758

llvm-svn: 67750

register classes. Before, MVT::Other would be returned anytime a reg was
in multiple register classes. Now, MVT::Other is only returned if the types
for those register classes differ.

llvm-svn: 67714

llvm-svn: 67565

 - Make type declarations match the struct/class keyword of the definition.
 - Move AddSignalHandler into the namespace where it belongs.
 - Correctly call functions from template base.
 - Some other small changes.
With this patch, LLVM and Clang should build properly and with far less noise under VS2008.

llvm-svn: 67347

Fix regression in 'tblgen -gen-clang-diags-defs': Emit the diagnostic kind instead of "DIAGNOSTICCONTROLLED".

llvm-svn: 67305

in selectiondag patterns.  This is required for the upcoming shuffle_vector rewrite,
and as it turns out, cleans up a hack in the Alpha instruction info.

llvm-svn: 67286