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  1. Aug 22, 2012
  2. Aug 21, 2012
  3. Aug 20, 2012
    • Jakob Stoklund Olesen's avatar
      Don't add CFG edges for redundant conditional branches. · 7d33c573
      Jakob Stoklund Olesen authored
      IR that hasn't been through SimplifyCFG can look like this:
      
        br i1 %b, label %r, label %r
      
      Make sure we don't create duplicate Machine CFG edges in this case.
      
      Fix the machine code verifier to accept conditional branches with a
      single CFG edge.
      
      llvm-svn: 162230
      7d33c573
    • Jakob Stoklund Olesen's avatar
      Add a verification pass after ExpandISelPseudos. · 1d026267
      Jakob Stoklund Olesen authored
      This pass often has weird CFG hacks and hand-written MI building code
      that can go wrong in many ways.
      
      llvm-svn: 162224
      1d026267
    • Jakob Stoklund Olesen's avatar
      Add CFG checks to MachineVerifier. · de31b52c
      Jakob Stoklund Olesen authored
      Verify that the predecessor and successor lists are consistent and free
      of duplicates.
      
      llvm-svn: 162223
      de31b52c
    • Stepan Dyatkovskiy's avatar
      Fixed DAGCombiner bug (found and localized by James Malloy): · 6a638ec5
      Stepan Dyatkovskiy authored
      The DAGCombiner tries to optimise a BUILD_VECTOR by checking if it
      consists purely of get_vector_elts from one or two source vectors. If
      so, it either makes a concat_vectors node or a shufflevector node.
      
      However, it doesn't check the element type width of the underlying
      vector, so if you have this sequence:
      
      Node0: v4i16 = ...
      Node1: i32 = extract_vector_elt Node0
      Node2: i32 = extract_vector_elt Node0
      Node3: v16i8 = BUILD_VECTOR Node1, Node2, ...
      
      It will attempt to:
      
      Node0:    v4i16 = ...
      NewNode1: v16i8 = concat_vectors Node0, ...
      
      Where this is actually invalid because the element width is completely
      different. This causes an assertion failure on DAG legalization stage.
      
      Fix:
      If output item type of BUILD_VECTOR differs from input item type.
      Make concat_vectors based on input element type and then bitcast it to the output vector type. So the case described above will transformed to:
      Node0:    v4i16 = ...
      NewNode1: v8i16 = concat_vectors Node0, ...
      NewNode2: v16i8 = bitcast NewNode1
      
      llvm-svn: 162195
      6a638ec5
  4. Aug 18, 2012
  5. Aug 17, 2012
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