llvm-svn: 160064

collisions until it is properly integrated in llvm/Support.

llvm-svn: 160063

llvm-svn: 160062

Add a hook to supply a custom CompilationDatabase. To add a custom CompilationDatabase, make it implement findCompilationDatabaseForDirectory in CustomCompilationDatabase.h and set USE_COSTUM_COMPILATION_DATABASE.

Differential Revision: http://llvm-reviews.chandlerc.com/D4

llvm-svn: 160061

from GNU binutils supporting multi-arch folder for ARM target.
Patch by Jiangning Liu <jiangning.liu@arm.com>.

llvm-svn: 160060

r1025 = s/zext r1024, 4
r1026 = extract_subreg r1025, 4

to a copy:
r1026 = copy r1024

This is correct. However it uses TII->isCoalescableExtInstr() which can return
true for instructions which essentially does a sext_in_reg so this can end up
with an illegal copy where the source and destination register classes do not
match. Add a check to avoid it. Sorry, no test case possible at this time.

rdar://11849816

llvm-svn: 160059

This caused 6 of 65k possible 8 bit udivs to be wrong.

llvm-svn: 160058

llvm-svn: 160057

llvm-svn: 160056

to Selection DAG isel.  Patch by Andrew Kaylor <andrew.kaylor@intel.com>.

llvm-svn: 160055

Also mention that -std=c++11 is now on by default on windows.

llvm-svn: 160054

Previously we'd halt at the fatal error as expected, but not actually emit
any -verify-related diagnostics. This lets us catch cases that emit a
/different/ fatal error from the one we expected.

This is implemented by adding a "force emit" mode to DiagnosticBuilder, which
will cause diagnostics to immediately be emitted regardless of current
suppression. Needless to say this should probably be used /very/ sparingly.

Patch by Andy Gibbs! Tests for all of Andy's -verify patches coming soon.

llvm-svn: 160053

llvm-svn: 160052

llvm-svn: 160051

Fixes bug 13322

Patch by Dmitry Mikushin

llvm-svn: 160050

llvm-svn: 160049

llvm-svn: 160048

Summary: How to guide for setting up clang tooling for llvm repo.

Test Plan: this is untested

Reviewers: klimek, djasper

Reviewed By: klimek

Differential Revision: http://llvm-reviews.chandlerc.com/D3

llvm-svn: 160047

When ext-loading and trunc-storing vectors to memory, on x86 32bit systems, allow loads/stores of 64bit values from xmm registers.

llvm-svn: 160044

llvm-svn: 160043

No functionality change.

llvm-svn: 160042

llvm-svn: 160041

llvm-svn: 160040

llvm-svn: 160039

llvm-svn: 160038

Load and Store nodes into their own functions.
No functional change.

llvm-svn: 160037

Only apply the SETCC+SITOFP -> SELECTCC optimization when the SETCC returns an MVT::i1, i.e. before type legalization.
This is a speculative fix for a problem on Mips reported by Akira Hatanaka.

llvm-svn: 160036

instantiation depends on the template, its arguments and parameters, but not
where it is instantiated.

llvm-svn: 160034

there's something going on there. Remove the unconditional line entry
and only add one if we're emitting cleanups (any other statements
would be handled normally).

Fixes rdar://9199234

llvm-svn: 160033

llvm-svn: 160032

Patch by Sasa Stankovic.

llvm-svn: 160031

This is probably not so useful yet because it is not path-sensitive, though
it does try to show inlining with indentation.

This also adds a dump() method to CallEvent, which should be useful for
debugging.

llvm-svn: 160030

C++ method calls and C function calls both appear as CallExprs in the AST.
This was causing crashes for an object that had a 'free' method.

<rdar://problem/11822244>

llvm-svn: 160029

   
   Low order register of a double word register operand. Operands 
   are defined by the name of the variable they are marked with in
   the inline assembler code. This is a way to specify that the 
   operand just refers to the low order register for that variable.
   
   It is the opposite of modifier 'D' which specifies the high order
   register.
   
   Example:
   
 main()
{

    long long ll_input = 0x1111222233334444LL;
    long long ll_val = 3;
    int i_result = 0;

    __asm__ __volatile__( 
		   "or	%0, %L1, %2"
	     : "=r" (i_result) 
	     : "r" (ll_input), "r" (ll_val)); 
}

   Which results in:
   
   	lui	$2, %hi(_gp_disp)
	addiu	$2, $2, %lo(_gp_disp)
	addiu	$sp, $sp, -8
	addu	$2, $2, $25
	sw	$2, 0($sp)
	lui	$2, 13107
	ori	$3, $2, 17476     <-- Low 32 bits of ll_input
	lui	$2, 4369
	ori	$4, $2, 8738      <-- High 32 bits of ll_input
	addiu	$5, $zero, 3  <-- Low 32 bits of ll_val
	addiu	$2, $zero, 0  <-- High 32 bits of ll_val
	#APP
	or	$3, $4, $5        <-- or i_result, high 32 ll_input, low 32 of ll_val
	#NO_APP
	addiu	$sp, $sp, 8
	jr	$ra

If not direction is done for the long long for 32 bit variables results
in using the low 32 bits as ll_val shows.

There is an existing bug if 'L' or 'D' is used for the destination register
for 32 bit long longs in that the target value will be updated incorrectly
for the non-specified part unless explicitly set within the inline asm code.

llvm-svn: 160028

It will surely be needed by heuristics.

llvm-svn: 160027

generalizing its implementation sufficiently to support this value
number scenario as well.

This cuts out another significant performance hit in large functions
(over 10k basic blocks, etc), especially those with "natural" CFG
structures.

llvm-svn: 160026

This ordering allows nested if-conversion without using a work list, and
it makes it possible to update the dominator tree on the fly as well.

Any erased basic blocks will always be dominated by the current
post-order position, so the domtree can be pruned without invalidating
the iterator.

llvm-svn: 160025

value-initialization for an array of class type with a trivial default
constructor.

llvm-svn: 160024

Also contains a number of tweaks to inlining that are necessary
for constructors and destructors. (I have this enabled on a private
branch, but it is very much unstable.)

llvm-svn: 160023

In order to accomplish this, we now build the callee's stack frame
as part of the CallEnter node, rather than the subsequent BlockEdge node.
This should not have any effect on perceived behavior or diagnostics.

This makes it safe to re-enable inlining of member overloaded operators.

llvm-svn: 160022