directives, allowing things like this:

def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;

Move the rest of the X86 MnemonicAliases over to the .td file.

llvm-svn: 117830

llvm-svn: 117824

llvm-svn: 117823

llvm-svn: 117822

llvm-svn: 117821

for shl.  Caught by inspection.

llvm-svn: 117820

llvm-svn: 117819

llvm-svn: 117818

llvm-svn: 117817

llvm-svn: 117816

just remaps one mnemonic to another.  Convert a few of the X86 aliases
from .cpp to .td code.

llvm-svn: 117815

llvm-svn: 117785

llvm-svn: 117773

Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.

llvm-svn: 117667

Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!

llvm-svn: 117514

llvm-svn: 117485

llvm-svn: 117474

(still to add ud2b).

llvm-svn: 117435

the wait prefix).

llvm-svn: 117434

sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler
allows for these instructions.  Done differently than in r117031 that
caused a valgrind error which was later reverted.

llvm-svn: 117433

will accept versions that the darwin assembler allows.  Forms ending in "pi" and
forms without all the operands.

llvm-svn: 117427

memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.

llvm-svn: 117413

llvm-svn: 117378

on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.

llvm-svn: 117364

cannot use tailcall.  PR 8461.

llvm-svn: 117322

we check for _GLOBAL_OFFSET_TABLE_.

llvm-svn: 117241

llvm-svn: 117206

llvm-svn: 117205

llvm-svn: 117202

until other LLVM projects using these are cleaned up.

llvm-svn: 117200

llvm-svn: 117099

It doesn't look like anything is wrong with the checkin,
but the new test cases expose a mem bug in AsmParser.

llvm-svn: 117087

weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix.  Also added
a test case for this.

llvm-svn: 117084

sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler allows
for these instructions.  Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).

llvm-svn: 117031

(gcc-4.6 warns about these).

llvm-svn: 117021

llvm-svn: 117020

llvm-svn: 116984

This should be the minimum set of functions that could possibly need it.

llvm-svn: 116978

llvm-svn: 116972

types are no longer Legal on X86, we don't need it.
No functional change.  8499854.

llvm-svn: 116947