- May 03, 2011
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Owen Anderson authored
Other parts of the SelectionDAG framework assume that targets use their pointer type for vector indices. Make the vector unrolling code respect that. llvm-svn: 130733
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- May 02, 2011
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Jakob Stoklund Olesen authored
llvm-svn: 130718
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Jakob Stoklund Olesen authored
llvm-svn: 130715
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Jakob Stoklund Olesen authored
Def operands may also have an <undef> flag, but that just means that a sub-register redef doesn't actually read the super-register. For physical registers, it has no meaning. llvm-svn: 130714
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Devang Patel authored
This works around a limitation in gdb which is reported by following inherit.exp test failures from gdb testsuite. gdb.cp/inherit.exp: print g_vB.vB::vb gdb.cp/inherit.exp: print g_vB.vB::vx gdb.cp/inherit.exp: print g_vC.vC::vc gdb.cp/inherit.exp: print g_vC.vC::vx gdb.cp/inherit.exp: print g_vD.vB::vb ... llvm-svn: 130702
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Rafael Espindola authored
llvm-svn: 130692
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Jakob Stoklund Olesen authored
When an interfering live range ends at a dead slot index between two instructions, make sure that the inserted copy instruction gets a slot index after the dead ones. This makes it possible to avoid the interference. Ideally, there shouldn't be interference ending at a deleted instruction, but physical register coalescing can sometimes do that to sub-registers. This fixes PR9823. llvm-svn: 130687
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- May 01, 2011
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Rafael Espindola authored
-fno-dwarf2-cfi-asm. Implement the same behavior. llvm-svn: 130637
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- Apr 30, 2011
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Jakob Stoklund Olesen authored
range covers the entire block. The live range can't be terminated at a random instruction. llvm-svn: 130619
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Jakob Stoklund Olesen authored
This could happen when trying to use a value that had been eliminated after dead code elimination and folding loads. llvm-svn: 130597
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Jakob Stoklund Olesen authored
llvm-svn: 130596
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Rafael Espindola authored
the final assembly. It is the same technique used when targeting assemblers that don't support .loc. llvm-svn: 130587
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Jakob Stoklund Olesen authored
llvm-svn: 130582
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Jakob Stoklund Olesen authored
llvm-svn: 130568
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Bill Wendling authored
llvm-svn: 130562
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Eli Friedman authored
Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM. llvm-svn: 130560
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- Apr 29, 2011
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Devang Patel authored
Hoist MCLineEntry construction AsmPrinter so that anyone who derives from AsmPrinter can have line number entries. PR 9810 llvm-svn: 130518
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Rafael Espindola authored
llvm-svn: 130504
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Rafael Espindola authored
emmits: .cfi_personality, .cfi_lsda and the moves. llvm-svn: 130503
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Rafael Espindola authored
llvm-svn: 130501
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- Apr 28, 2011
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Devang Patel authored
This fixes clang generated blocks' variables' debug info. Radar 9279956. llvm-svn: 130373
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Eli Friedman authored
llvm-svn: 130360
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Rafael Espindola authored
llvm-svn: 130343
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Rafael Espindola authored
give it a bit more responsibility. Also implement it for MachO. If hacked to use cfi, 32 bit MachO will produce .cfi_personality 155, L___gxx_personality_v0$non_lazy_ptr and 64 bit will produce .cfi_presonality ___gxx_personality_v0 The general idea is that .cfi_personality gets passed the final symbol. It is up to codegen to produce it if using indirect representation (like 32 bit MachO), but it is up to MC to decide which relocations to create. llvm-svn: 130341
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Devang Patel authored
llvm-svn: 130339
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Eli Friedman authored
Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is common. rdar://problem/9303592 . llvm-svn: 130338
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Eli Friedman authored
llvm-svn: 130337
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- Apr 27, 2011
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Rafael Espindola authored
llvm-svn: 130331
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Devang Patel authored
llvm-svn: 130326
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Evan Cheng authored
successors) and use inverse depth first search to traverse the BBs. However that doesn't work when the CFG has infinite loops. Simply do a linear traversal of all BBs work just fine. rdar://9344645 llvm-svn: 130324
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Jakob Stoklund Olesen authored
We cannot rely on the <imp-def> operands added by LiveIntervals in all cases as demonstrated by the test case. llvm-svn: 130313
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Jakob Stoklund Olesen authored
The number of blocks covered by a live range must be strictly decreasing when splitting, otherwise we can't allow repeated splitting. llvm-svn: 130249
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- Apr 26, 2011
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Evan Cheng authored
more callee-saved registers and introduce copies. Only allows it if scheduling a node above calls would end up lessen register pressure. Call operands also has added ABI restrictions for register allocation, so be extra careful with hoisting them above calls. rdar://9329627 llvm-svn: 130245
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Rafael Espindola authored
llvm-svn: 130232
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Devang Patel authored
llvm-svn: 130231
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Jakob Stoklund Olesen authored
This has two effects: 1. We never inflate to a larger register class than what the sub-target can handle. 2. Completely unconstrained virtual registers get the largest possible register class. llvm-svn: 130229
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Dan Gohman authored
llvm-svn: 130205
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Chris Lattner authored
symbols. For example, don't emit: .comm _i,4,2 ## @i ## @i instead emit: .comm _i,4,2 ## @i llvm-svn: 130192
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Evan Cheng authored
llvm-svn: 130190
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Rafael Espindola authored
Remove previous DwarfCFI hack. llvm-svn: 130187
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