llvm-svn: 146897

llvm-svn: 146896

rdar://10602276

llvm-svn: 146895

llvm-svn: 146894

direct-object emitter should emit the appropriate shift instruction depending
on the shift amount.

llvm-svn: 146893

llvm-svn: 146892

"id" from being found by the parser as an
externally-defined type.  Before, "id" would
sometimes make it through if it was defined in
a namespace, but this sometimes caused
confusion, for example when it conflicted with
std::locale::id.

llvm-svn: 146891

llvm-svn: 146890

llvm-svn: 146889

This change reduces the number of instructions generated.

For example, 
(load (add (sub $n0, $n1), (MipsLo got(s))))

results in the following sequence of instructions:
1. sub $n2, $n0, $n1
2. lw got(s)($n2)

Previously, three instructions were needed.
1. sub $n2, $n0, $n1
2. addiu $n3, $n2, got(s)
3. lw 0($n3)

llvm-svn: 146888

llvm-svn: 146887

with a definition pointer (e.g., C++ and Objective-C classes), zip
through the redeclaration chain to make sure that all of the
declarations point to the definition data. 

As part of this, realized again why the first redeclaration of an
entity in a file is important, and brought back that idea.

llvm-svn: 146886

llvm-svn: 146885

There's more variation that we need to handle. Error checking will need
to be on operand predicates.

llvm-svn: 146884

redeclaration templates (RedeclarableTemplateDecl), similarly to the
way (de-)serialization is implemented for Redeclarable<T>. In the
process, found a simpler formulation for handling redeclaration
chains and implemented that in both places.

The new test establishes that we're building the redeclaration chains
properly. However, the FIXME indicates where we're tickling a
different bug that has to do with us not setting the DefinitionData
pointer properly in redeclarations that we detected after the
definition itself was deserialized. The (separable) fix for that bug
is forthcoming.

llvm-svn: 146883

llvm-svn: 146882

llvm-svn: 146881

Add the new TableGen register class synthesizer feature to the release
notes.

llvm-svn: 146875

Now that getMatchingSuperRegClass() returns accurate results, it can be
used to compute constraints imposed by instructions using a sub-register
of a virtual register.

This means we can recompute the register class of any virtual register
by combining the constraints from all its uses.

llvm-svn: 146874

Use information computed while inferring new register classes to emit
accurate, table-driven implementations of getMatchingSuperRegClass().

Delete the old manual, error-prone implementations in the targets.

llvm-svn: 146873

Teach TableGen to create the missing register classes needed for
getMatchingSuperRegClass() to return maximal results.  The function is
still not auto-generated, so it still returns inexact results.

This produces these new register classes:

ARM:
    QQPR_with_dsub_0_in_DPR_8
    QQQQPR_with_dsub_0_in_DPR_8
X86:
    GR64_with_sub_32bit_in_GR32_NOAX
    GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP
    GR64_with_sub_16bit_in_GR16_NOREX
    GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX
    GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX
    GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP
    GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX
    GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX
    GR64_with_sub_32bit_in_GR32_TC
    GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX
    GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC
    GR64_with_sub_32bit_in_GR32_AD
    GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX

The other targets in the tree are not weird enough to be affected.

llvm-svn: 146872

llvm-svn: 146871

imported modules that don't introduce any new entities of a particular
kind. Allow these entries to be replaced with entries for another
loaded module.

In the included test case, selectors exhibit this behavior.

llvm-svn: 146870

which there are no redeclarations. This reduced by size of the PCH
file for Cocoa.h by ~650k: ~536k of that was in the new
LOCAL_REDECLARATIONS table, which went from a ridiculous 540k down to
an acceptable 3.5k, while the rest was due to the more compact
abbreviated representation of redeclarable declaration kinds (which no
longer need to store the 'first' declaration ID).

llvm-svn: 146869

llvm-svn: 146868

the inner decl being a builtin. This is needed to support the glibc headers
in fedora 16 (2.14).

llvm-svn: 146867

into operations on TypedefNameDecl. No functionality change.

llvm-svn: 146866

The integral types now work with clang trunk (if you remove the guard), although we're still missing an intrinsic for initialising atomics (needed for C1x too).

Howard: Please review.
llvm-svn: 146865

llvm-svn: 146864

llvm-svn: 146863

llvm-svn: 146862

Forming an out of bounds pointer to check if it's out
of bounds was undefined behavior.

llvm-svn: 146861

llvm-svn: 146859

llvm-svn: 146857

variable is initialized by a non-constant expression, and pass in the variable
being declared so that earlier-initialized fields' values can be used.

Rearrange VarDecl init evaluation to make this possible, and in so doing fix a
long-standing issue in our C++ constant expression handling, where we would
mishandle cases like:

  extern const int a;
  const int n = a;
  const int a = 5;
  int arr[n];

Here, n is not initialized by a constant expression, so can't be used in an ICE,
even though the initialization expression would be an ICE if it appeared later
in the TU. This requires computing whether the initializer is an ICE eagerly,
and saving that information in PCH files.

llvm-svn: 146856

Begin adding AVX2 intrinsics. Necessitated increasing the number of bits used to store builtinID when serializing identifier table.

llvm-svn: 146855

- Remove trailing spaces.

llvm-svn: 146854

llvm-svn: 146853

llvm-svn: 146852

attribute themselve.

llvm-svn: 146851